Add more exceptions to medeleg tests

wally-pipelined/testbench/testbench-imperas.sv

@@ -355,8 +355,8 @@ module testbench();
     "rv64p/WALLY-MIMPID", "4000",
     "rv64p/WALLY-MHARTID", "4000",
     "rv64p/WALLY-MVENDORID", "4000",
-    "rv64p/WALLY-MEDELEG", "2000",
     "rv64p/WALLY-MIE", "3000"
+    "rv64p/WALLY-MEDELEG", "4000"
   };
 
   string tests32p[] = '{
@@ -370,7 +370,7 @@ module testbench();
     "rv32p/WALLY-MIMPID", "4000",
     "rv32p/WALLY-MHARTID", "4000",
     "rv32p/WALLY-MVENDORID", "4000"
-    //"rv32p/WALLY-MEDELEG", "2000" // all 32 bit tests are currently failing, so haven't been able to confirm this test works yet. It should, though.
+    //"rv32p/WALLY-MEDELEG", "4000" // all 32 bit tests are currently failing, so haven't been able to confirm this test works yet. It should, though.
   };
 
   string tests64periph[] = '{

wally-pipelined/testgen/privileged/testgen-CAUSE.py

@@ -58,8 +58,13 @@ def writeVectors(storecmd, returningInstruction):
   # """)
 
   # User Timer Interrupt: True, 4
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
+  
   # Supervior timer interrupt: True, 5
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
+
   # Machine timer interrupt: True, 7
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
 
   # if fromMode == "m":
   #   clintAddr = "0x2004000"
@@ -152,10 +157,17 @@ def writeVectors(storecmd, returningInstruction):
   # """)
 
   # User external input: True, 8
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
+
   # Supervisor external input: True, 9
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
+
   # Machine externa input: True, 11
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
 
   # Instruction address misaligned: False, 0
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
+
   # looks like this is giving us an infinite loop for wally
   # BUG: jumping to a misaligned instruction address doesn't cause an exception: we actually jump...
   # Either that, or somehow at the end we always end up at 0x80004002
@@ -166,6 +178,7 @@ def writeVectors(storecmd, returningInstruction):
   # """, False, 0)
 
   # Instruction access fault: False, 1
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
 
   # Illegal Instruction 
   writeTest(storecmd, f, r, f"""
@@ -184,16 +197,14 @@ def writeVectors(storecmd, returningInstruction):
   """, False, 4)
 
   # Load Access fault: False, 5
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
 
   # Store/AMO address misaligned
   writeTest(storecmd, f, r, f"""
     sw x0, 11(x0)
   """, False, 6)
 
-  # Environment call from u-mode: only for when only M and U mode enabled?
+  # Environment call
-  # writeTest(storecmd, f, r, f"""
-  #   ecall
-  # """, False, 8, "u")
   if returningInstruction != "ecall":
     if fromMode == "u":
       writeTest(storecmd, f, r, f"""
@@ -213,8 +224,13 @@ def writeVectors(storecmd, returningInstruction):
       """, False, 11, "m")  
 
   # Instruction page fault: 12
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
+
   # Load page fault: 13
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
+
   # Store/AMO page fault: 15
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
   
 
   

wally-pipelined/testgen/privileged/testgen-DELEG.py

@@ -52,26 +52,44 @@ def writeVectors(storecmd):
   # Instruction access fault: False, 1
 
   # Illegal Instruction 
-  #writeTest(storecmd, f, r, "ecall", False, 11, "m")
+  #writeTest(storecmd, f, r, "ecall", False, 11)
+
+  writeTest(storecmd, f, r, f"""
+    .fill 1, 4, 0
+  """, False, 2)
 
   # Breakpoint
   writeTest(storecmd, f, r, "ebreak", False, 3)
 
   # Load Address Misaligned 
-  # writeTest(storecmd, f, r, f"""
+  writeTest(storecmd, f, r, f"""
-  #   lw x0, 11(x0)
+    lw x0, 11(x0)
-  # """, False, 4)
+  """, False, 4)
 
   # # Load Access fault: False, 5
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
 
   # # Store/AMO address misaligned
-  # writeTest(storecmd, f, r, f"""
+  writeTest(storecmd, f, r, f"""
-  #   sw x0, 11(x0)
+    sw x0, 11(x0)
-  # """, False, 6)
+  """, False, 6)
+
+  # Breakpoint: codes 8, 9, 11
+  writeTest(storecmd, f, r, "ecall", False, -1) # code determined inside of writeTest
+
+  # Instruction page fault: 12
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
+
+  # Load page fault: 13
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
+
+  # Store/AMO page fault: 15
+  # TODO: THIS NEEDS TO BE IMPLEMENTED
+  
 
   #writeTest(storecmd, f, r, "ecall", False, 11, "m")
   
-def writeTest(storecmd, f, r, test, interrupt, code, mode = "m", resetHander = ""):
+def writeTest(storecmd, f, r, test, interrupt, code, resetHander = ""):
   global testnum
   global testMode
   global isInterrupts
@@ -79,9 +97,18 @@ def writeTest(storecmd, f, r, test, interrupt, code, mode = "m", resetHander = "
   if interrupt != isInterrupts:
     return
   
-  mask = 1 << code
   delegateType = "i" if interrupt else "e"
   for mode in (["m", "s", "u"] if testMode == "m" else ["s", "u"]):
+
+    if test == "ecall":
+      if mode == "m":
+        code = 11
+      elif mode == "s":
+        code = 9
+      else:
+        code = 8
+
+    mask = 1 << code
     for delegated in [True, False]:
       labelSuffix = testnum
 
@@ -235,11 +262,9 @@ for xlen in xlens:
         csrr x17, medeleg
       """)
 
-      print("\n\n" + basename)
       testnum = 0
       for i in range(0, 2):
         writeVectors(storecmd)
-      print(testnum)
 
       f.write(f"""
         csrw mtvec, x19