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Update SVF test

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This commit is contained in:
Matthew Otto 2024-07-05 09:45:00 -05:00
parent 028cdde868
commit fd54731cf6
3 changed files with 11 additions and 7 deletions
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2
testbench/jtag/svf_convert.py
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@ -11,7 +11,7 @@ MAXLEN = 2**LENGTH_BITS
def main(): def main():
filepath = "testbench/jtag/test.svf" filepath = "testbench/jtag/test.svf"
dest_filepath = "testbench/jtag/test.mem" dest_filepath = "testbench/jtag/test.memfile"
with open(filepath, "r") as file: with open(filepath, "r") as file:
data = file.read() data = file.read()
data = data.lower() data = data.lower()

14
testbench/jtag/test.svf
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@ -1,8 +1,12 @@
// SVF commands to pull to idcode out of jtag module // SVF commands to pull to idcode out of jtag module
SIR 5 TDI(1); // IDCODE SIR 5 TDI(1); // IDCODE
SDR 32 TDO(DEADBEEF); SDR 32 TDO(1002AC05);
SDR 32 TDO(DEADBEAF); // JTAG_Driver should throw error if TDO value doesn't match what is scanned out //SDR 32 TDO(DEADBEAF); ! JTAG_Driver should throw error if TDO value doesn't match what is scanned out
RUNTEST 55; !RUNTEST 55;
sir 8 !and multiline commands SIR 5 TDI(10); // DTMCS
tdo(99); SDR 32 TDO(71) MASK(FFFF8FFF);
SIR 5 TDI(11); // DMI
SDR 41 TDI(4000000006); // Activate DM
SDR 41 TDI(4400000001); // Send Read DMStatus command
SDR 41 TDO(A3) MASK(FF); // Scan out DMStatus

2
testbench/testbench.sv
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@ -583,7 +583,7 @@ module testbench;
// TODO: drive jtag clock at 1/10th core clock (variable) // TODO: drive jtag clock at 1/10th core clock (variable)
if (P.DEBUG_SUPPORTED) begin if (P.DEBUG_SUPPORTED) begin
always @(posedge clk) begin always @(posedge clk) begin
jtagmemfilename = "../tests/test.svf.memfile"; jtagmemfilename = "../tests/jtag/test.memfile";
if (LoadMem) begin if (LoadMem) begin
$readmemh(jtagmemfilename, jtag.MEM); $readmemh(jtagmemfilename, jtag.MEM);
$display("Read memfile %s", jtagmemfilename); $display("Read memfile %s", jtagmemfilename);