Shared amoalu max/min comparator hardware and removed input sign extend muxes

This commit is contained in:
David Harris 2024-03-24 17:15:46 -07:00
parent f0b29d3083
commit fc158689ad

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@ -37,12 +37,16 @@ module amoalu import cvw::*; #(parameter cvw_t P) (
); );
logic [P.XLEN-1:0] a, b, y; logic [P.XLEN-1:0] a, b, y;
logic sngd, eq, lt, eq32, lt32, w64; logic lt, cmp, sngd, sngd32, eq32, lt32, w64;
// Rename inputs
assign a = ReadDataM;
assign b = IHWriteDataM;
// Share hardware among the four amomin/amomax comparators // Share hardware among the four amomin/amomax comparators
assign sngd = ~LSUFunct7M[5]; // Funct7[5] = 0 for signed amomin/max assign sngd = ~LSUFunct7M[5]; // Funct7[5] = 0 for signed amomin/max
assign w64 = (LSUFunct3M[1:0] == 2'b10); // operate on bottom 32 bits assign w64 = (LSUFunct3M[1:0] == 2'b10); // operate on bottom 32 bits
assign sngd32 = sngd & (P.XLEN == 32 | w64); assign sngd32 = sngd & (P.XLEN == 32 | w64); // flip sign in lower 32 bits on 32-bit comparisons only
comparator #(32) cmp32(a[31:0], b[31:0], sngd32, {eq32, lt32}); comparator #(32) cmp32(a[31:0], b[31:0], sngd32, {eq32, lt32});
if (P.XLEN == 32) begin if (P.XLEN == 32) begin
@ -51,12 +55,13 @@ module amoalu import cvw::*; #(parameter cvw_t P) (
logic equpper, ltupper, lt64; logic equpper, ltupper, lt64;
comparator #(32) cmpupper(a[63:32], b[63:32], sngd, {equpper, ltupper}); comparator #(32) cmpupper(a[63:32], b[63:32], sngd, {equpper, ltupper});
assign lt64 = ltupper | equpper & lt32; assign lt64 = ltupper | equpper & lt32;
assign lt = w64 ? lt32 : lt64; assign lt = w64 ? lt32 : lt64;
end end
// and the same mux can be used to select b for swap. assign cmp = lt ^ LSUFunct7M[4]; // flip sense of comparison for maximums
// AMO ALU
always_comb always_comb
case (LSUFunct7M[6:2]) case (LSUFunct7M[6:2])
5'b00001: y = b; // amoswap 5'b00001: y = b; // amoswap
@ -64,27 +69,21 @@ module amoalu import cvw::*; #(parameter cvw_t P) (
5'b00100: y = a ^ b; // amoxor 5'b00100: y = a ^ b; // amoxor
5'b01100: y = a & b; // amoand 5'b01100: y = a & b; // amoand
5'b01000: y = a | b; // amoor 5'b01000: y = a | b; // amoor
5'b10000: y = lt ? a : b; // amomin 5'b10000: y = cmp ? a : b; // amomin
5'b10100: y = lt ? b : a; // amomax 5'b10100: y = cmp ? a : b; // amomax
5'b11000: y = lt ? a : b; // amominu 5'b11000: y = cmp ? a : b; // amominu
5'b11100: y = lt ? b : a; // amomaxu 5'b11100: y = cmp ? a : b; // amomaxu
default: y = 'x; // undefined; *** could change to b for efficiency default: y = 'x; // undefined; *** could change to b for efficiency
endcase endcase
// sign extend if necessary // sign extend output if necessary for w64
if (P.XLEN == 32) begin:sext if (P.XLEN == 32) begin:sext
assign a = ReadDataM;
assign b = IHWriteDataM;
assign AMOResultM = y; assign AMOResultM = y;
end else begin:sext // P.XLEN = 64 end else begin:sext // P.XLEN = 64
always_comb always_comb
if (LSUFunct3M[1:0] == 2'b10) begin // sign-extend word-length operations if (w64) begin // sign-extend word-length operations
a = {{32{ReadDataM[31]}}, ReadDataM[31:0]};
b = {{32{IHWriteDataM[31]}}, IHWriteDataM[31:0]};
AMOResultM = {{32{y[31]}}, y[31:0]}; AMOResultM = {{32{y[31]}}, y[31:0]};
end else begin end else begin
a = ReadDataM;
b = IHWriteDataM;
AMOResultM = y; AMOResultM = y;
end end
end end