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Updated riscv arch test removed misaligned1.

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This commit is contained in:
Ross Thompson 2022-12-04 00:10:16 +00:00
parent 350fdd944d
commit fc05e27416
4 changed files with 6 additions and 6 deletions
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2
addins/riscv-arch-test

@ -1 +1 @@
Subproject commit e5020bf7b345f8efb96c6c939de3162525b7f545 Subproject commit e302d3bab41a46ec388691b1d961aa09fe2a4bc4

4
pipelined/testbench/tests.vh
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@ -923,7 +923,7 @@ string imperas32f[] = '{
`RISCVARCHTEST, `RISCVARCHTEST,
"rv64i_m/privilege/src/ebreak.S", "rv64i_m/privilege/src/ebreak.S",
"rv64i_m/privilege/src/ecall.S", "rv64i_m/privilege/src/ecall.S",
"rv64i_m/privilege/src/misalign1-jalr-01.S", // "rv64i_m/privilege/src/misalign1-jalr-01.S",
"rv64i_m/privilege/src/misalign2-jalr-01.S", "rv64i_m/privilege/src/misalign2-jalr-01.S",
"rv64i_m/privilege/src/misalign-beq-01.S", "rv64i_m/privilege/src/misalign-beq-01.S",
"rv64i_m/privilege/src/misalign-bge-01.S", "rv64i_m/privilege/src/misalign-bge-01.S",
@ -1383,7 +1383,7 @@ string imperas32f[] = '{
`RISCVARCHTEST, `RISCVARCHTEST,
"rv32i_m/privilege/src/ebreak.S", "rv32i_m/privilege/src/ebreak.S",
"rv32i_m/privilege/src/ecall.S", "rv32i_m/privilege/src/ecall.S",
"rv32i_m/privilege/src/misalign1-jalr-01.S", // "rv32i_m/privilege/src/misalign1-jalr-01.S",
"rv32i_m/privilege/src/misalign2-jalr-01.S", "rv32i_m/privilege/src/misalign2-jalr-01.S",
"rv32i_m/privilege/src/misalign-beq-01.S", "rv32i_m/privilege/src/misalign-beq-01.S",
"rv32i_m/privilege/src/misalign-bge-01.S", "rv32i_m/privilege/src/misalign-bge-01.S",

2
tests/riscof/Makefile
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@ -27,7 +27,7 @@ fsd_fld_tempfix:
find ../../addins/riscv-arch-test/riscv-test-suite -type f -name "*d_fsd-align*.S" | xargs -I{} sed -i 's,regex(\.\*32\.\*),regex(\.\*64\.\*),g' {} find ../../addins/riscv-arch-test/riscv-test-suite -type f -name "*d_fsd-align*.S" | xargs -I{} sed -i 's,regex(\.\*32\.\*),regex(\.\*64\.\*),g' {}
arch32: arch32:
riscof run --work-dir=$(work_dir) --config=config32.ini --suite=$(arch_dir)/riscv-test-suite/ --env=$(arch_dir)/riscv-test-suite/env --no-browser riscof --verbose debug run --work-dir=$(work_dir) --config=config32.ini --suite=$(arch_dir)/riscv-test-suite/ --env=$(arch_dir)/riscv-test-suite/env --no-browser
rsync -a $(work_dir)/rv32i_m/ $(arch_workdir)/rv32i_m/ || echo "error suppressed" rsync -a $(work_dir)/rv32i_m/ $(arch_workdir)/rv32i_m/ || echo "error suppressed"
arch64: arch64:

4
tests/riscof/spike/spike_rv32imc_isa.yaml
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@ -1,11 +1,11 @@
hart_ids: [0] hart_ids: [0]
hart0: hart0:
ISA: RV32IMAFDCZicsr_Zifencei ISA: RV32IMAFCZicsr_Zifencei
physical_addr_sz: 32 physical_addr_sz: 32
User_Spec_Version: '2.3' User_Spec_Version: '2.3'
supported_xlen: [32] supported_xlen: [32]
misa: misa:
reset-val: 0x4000112D reset-val: 0x40001125
rv32: rv32:
accessible: true accessible: true
mxl: mxl: