mirror of
https://github.com/openhwgroup/cvw
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Merge pull request #990 from jordancarlin/installation_path_checks
Make installation logs more obvious and point to them if installation fails
This commit is contained in:
David Harris
GitHub
commit
fbc5e5ddea
@ -48,6 +48,7 @@ ENDC='\033[0m' # Reset to default color
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error() {
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echo -e "${FAIL_COLOR}Error: $STATUS installation failed"
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echo -e "Error on line ${BASH_LINENO[0]} with command $BASH_COMMAND${ENDC}"
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echo -e "Please check the log in $RISCV/logs/$STATUS.log for more information."
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exit 1
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}
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@ -205,14 +206,14 @@ fi
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# This configuration enables multilib to target many flavors of RISC-V.
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# This book is tested with GCC 13.2.0
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section_header "Installing/Updating RISC-V GNU Toolchain"
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STATUS="RISC-V GNU Toolchain"
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STATUS="riscv-gnu-toolchain"
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cd "$RISCV"
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# Temporarily pin riscv-gnu-toolchain to use GCC 13.2.0. GCC 14 does not work with the Q extension.
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if git_check "riscv-gnu-toolchain" "https://github.com/riscv/riscv-gnu-toolchain" "$RISCV/riscv-gnu-toolchain/stamps/build-gcc-newlib-stage2" "b488ddb"; then
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cd riscv-gnu-toolchain
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git reset --hard && git clean -f && git checkout b488ddb #&& git pull
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./configure --prefix="${RISCV}" --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;"
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make -j "${NUM_THREADS}" 2>&1 | logger riscv-gnu-toolchain; [ "${PIPESTATUS[0]}" == 0 ]
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make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
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if [ "$clean" ]; then
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cd "$RISCV"
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rm -rf riscv-gnu-toolchain
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@ -239,8 +240,8 @@ if git_check "elf2hex" "https://github.com/sifive/elf2hex.git" "$RISCV/bin/riscv
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git reset --hard && git clean -f && git checkout master && git pull
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autoreconf -i
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./configure --target=riscv64-unknown-elf --prefix="$RISCV"
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make 2>&1 | logger elf2hex; [ "${PIPESTATUS[0]}" == 0 ]
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make install 2>&1 | logger elf2hex; [ "${PIPESTATUS[0]}" == 0 ]
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make 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
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make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
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if [ "$clean" ]; then
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cd "$RISCV"
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rm -rf elf2hex
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@ -254,15 +255,15 @@ fi
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# QEMU (https://www.qemu.org/docs/master/system/target-riscv.html)
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# QEMU is an open source machine emulator and virtualizer capable of emulating RISC-V
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section_header "Installing/Updating QEMU"
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STATUS="QEMU"
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STATUS="qemu"
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cd "$RISCV"
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if git_check "qemu" "https://github.com/qemu/qemu" "$RISCV/include/qemu-plugin.h"; then
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cd qemu
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git reset --hard && git clean -f && git checkout master && git pull --recurse-submodules -j "${NUM_THREADS}"
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git submodule update --init --recursive
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./configure --target-list=riscv64-softmmu --prefix="$RISCV"
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make -j "${NUM_THREADS}" 2>&1 | logger qemu; [ "${PIPESTATUS[0]}" == 0 ]
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make install 2>&1 | logger qemu; [ "${PIPESTATUS[0]}" == 0 ]
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make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
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make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
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if [ "$clean" ]; then
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cd "$RISCV"
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rm -rf qemu
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@ -276,7 +277,7 @@ fi
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# Spike (https://github.com/riscv-software-src/riscv-isa-sim)
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# Spike is a reference model for RISC-V. It is a functional simulator that can be used to run RISC-V programs.
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section_header "Installing/Updating SPIKE"
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STATUS="SPIKE"
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STATUS="spike"
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cd "$RISCV"
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if git_check "riscv-isa-sim" "https://github.com/riscv-software-src/riscv-isa-sim" "$RISCV/lib/pkgconfig/riscv-riscv.pc"; then
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cd riscv-isa-sim
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@ -284,8 +285,8 @@ if git_check "riscv-isa-sim" "https://github.com/riscv-software-src/riscv-isa-si
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mkdir -p build
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cd build
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../configure --prefix="$RISCV"
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make -j "${NUM_THREADS}" 2>&1 | logger spike; [ "${PIPESTATUS[0]}" == 0 ]
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make install 2>&1 | logger spike; [ "${PIPESTATUS[0]}" == 0 ]
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make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
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make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
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if [ "$clean" ]; then
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cd "$RISCV"
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rm -rf riscv-isa-sim
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@ -301,7 +302,7 @@ fi
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# It is used for linting and simulation of Wally.
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# Verilator needs to be built from source to get the latest version (Wally needs 5.021 or later).
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section_header "Installing/Updating Verilator"
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STATUS="Verilator"
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STATUS="verilator"
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cd "$RISCV"
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if git_check "verilator" "https://github.com/verilator/verilator" "$RISCV/share/pkgconfig/verilator.pc"; then
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unset VERILATOR_ROOT
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@ -309,8 +310,8 @@ if git_check "verilator" "https://github.com/verilator/verilator" "$RISCV/share/
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git reset --hard && git clean -f && git checkout master && git pull
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autoconf
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./configure --prefix="$RISCV"
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make -j "${NUM_THREADS}" 2>&1 | logger verilator; [ "${PIPESTATUS[0]}" == 0 ]
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make install 2>&1 | logger verilator; [ "${PIPESTATUS[0]}" == 0 ]
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make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
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make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
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if [ "$clean" ]; then
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cd "$RISCV"
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rm -rf verilator
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@ -339,12 +340,12 @@ fi
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# RISC-V Sail Model (https://github.com/riscv/sail-riscv)
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# The RISC-V Sail Model is the golden reference model for RISC-V. It is written in Sail (described above)
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section_header "Installing/Updating RISC-V Sail Model"
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STATUS="RISC-V Sail Model"
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STATUS="riscv-sail-model"
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if git_check "sail-riscv" "https://github.com/riscv/sail-riscv.git" "$RISCV/bin/riscv_sim_RV32"; then
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cd sail-riscv
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git reset --hard && git clean -f && git checkout master && git pull
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ARCH=RV64 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV64 2>&1 | logger sailModel; [ "${PIPESTATUS[0]}" == 0 ]
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ARCH=RV32 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV32 2>&1 | logger sailModel; [ "${PIPESTATUS[0]}" == 0 ]
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ARCH=RV64 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV64 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
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ARCH=RV32 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV32 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
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cp -f c_emulator/riscv_sim_RV64 "$RISCV"/bin/riscv_sim_RV64
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cp -f c_emulator/riscv_sim_RV32 "$RISCV"/bin/riscv_sim_RV32
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if [ "$clean" ]; then
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@ -376,7 +377,7 @@ fi
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# Buildroot is used to boot a minimal versio of Linux on Wally.
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# Testvectors are generated using QEMU.
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section_header "Installing Buildroot and Creating Linux testvectors"
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STATUS="Buildroot"
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STATUS="buildroot"
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if [ -z "$LD_LIBRARY_PATH" ]; then
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export LD_LIBRARY_PATH=$RISCV/lib:$RISCV/lib64:$RISCV/riscv64-unknown-elf/lib:$RISCV/lib/x86_64-linux-gnu/
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else
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@ -384,11 +385,11 @@ else
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fi
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cd "$dir"/../linux
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if [ ! -e "$RISCV"/buildroot ]; then
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make 2>&1 | logger buildroot; [ "${PIPESTATUS[0]}" == 0 ]
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make 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
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echo -e "${SUCCESS_COLOR}Buildroot successfully installed and Linux testvectors created!${ENDC}"
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elif [ ! -e "$RISCV"/linux-testvectors ]; then
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echo -e "${OK_COLOR}Buildroot already exists, but Linux testvectors are missing. Generating them now.${ENDC}"
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make dumptvs 2>&1 | logger buildroot; [ "${PIPESTATUS[0]}" == 0 ]
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make dumptvs 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
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echo -e "${SUCCESS_COLOR}Linux testvectors successfully generated!${ENDC}"
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else
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echo -e "${OK_COLOR}Buildroot and Linux testvectors already exist.${ENDC}"
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