From 1f3792c82337cdb29f1dfce0fd138227356d87b2 Mon Sep 17 00:00:00 2001 From: Rose Thompson Date: Fri, 5 Jan 2024 23:32:10 -0600 Subject: [PATCH] Fixed bug # 547, but there are other bugs which follow. --- src/mmu/mmu.sv | 2 +- src/mmu/tlb/tlbcontrol.sv | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mmu/mmu.sv b/src/mmu/mmu.sv index 25d17da91..c26ee2a44 100644 --- a/src/mmu/mmu.sv +++ b/src/mmu/mmu.sv @@ -145,5 +145,5 @@ module mmu import cvw::*; #(parameter cvw_t P, // Specify which type of page fault is occurring assign InstrPageFaultF = TLBPageFault & ExecuteAccessF; assign LoadPageFaultM = TLBPageFault & ReadNoAmoAccessM; - assign StoreAmoPageFaultM = TLBPageFault & WriteAccessM; + assign StoreAmoPageFaultM = TLBPageFault & (WriteAccessM | (|CMOpM)); endmodule diff --git a/src/mmu/tlb/tlbcontrol.sv b/src/mmu/tlb/tlbcontrol.sv index 8c8058167..dced20d29 100644 --- a/src/mmu/tlb/tlbcontrol.sv +++ b/src/mmu/tlb/tlbcontrol.sv @@ -111,7 +111,7 @@ module tlbcontrol import cvw::*; #(parameter cvw_t P, ITLB = 0) ( // Check for write error. Writes are invalid when the page's write bit is // low. assign InvalidWrite = WriteAccess & ~PTE_W; - assign InvalidCBOM = (|CMOpM[2:0]) & (~PTE_W | (~PTE_R & (~STATUS_MXR | ~PTE_X))); + assign InvalidCBOM = (|CMOpM[2:0]) & (~PTE_W & (~PTE_R & (~STATUS_MXR | ~PTE_X))); assign InvalidCBOZ = CMOpM[3] & ~PTE_W; assign InvalidAccess = InvalidRead | InvalidWrite | InvalidCBOM | InvalidCBOZ; assign PreUpdateDA = ~PTE_A | WriteAccess & ~PTE_D;