mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
separate galois function SV per the style file
This commit is contained in:
James E. Stine
parent
32be22565a
commit
f700b7da5a
@ -1,161 +0,0 @@
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///////////////////////////////////////////
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// galois_func.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
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// Purpose: Galois field operations for mix columns operation
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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// https://github.com/openhwgroup/cvw
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//
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module gm2 (gm2_in, gm2_out);
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input logic [7:0] gm2_in;
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output logic [7:0] gm2_out;
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// Set output to Galois Mult 2
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assign gm2_out = {gm2_in[6:0], 1'b0} ^ (8'h1b & {8{gm2_in[7]}});
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endmodule
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module gm3 (gm3_in, gm3_out);
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input logic [7:0] gm3_in;
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output logic [7:0] gm3_out;
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// Internal Logic
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logic [7:0] gm2_0_out;
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// Sub-Modules for gm2 multiplication
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gm2 gm2_0 (.gm2_in(gm3_in), .gm2_out(gm2_0_out));
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// Assign Output
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assign gm3_out = gm2_0_out ^ gm3_in;
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endmodule
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module gm4 (gm4_in, gm4_out);
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input logic [7:0] gm4_in;
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output logic [7:0] gm4_out;
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// Internal Logic
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logic [7:0] gm2_0_out;
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logic [7:0] gm2_1_out;
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// Sub-Modules for multiple gm2 multiplications
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gm2 gm2_0 (.gm2_in(gm4_in), .gm2_out(gm2_0_out));
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gm2 gm2_1 (.gm2_in(gm2_0_out), .gm2_out(gm2_1_out));
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// Assign output to second gm2 output
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assign gm4_out = gm2_1_out;
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endmodule
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module gm8 (gm8_in, gm8_out);
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input logic [7:0] gm8_in;
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output logic [7:0] gm8_out;
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// Internal Logic
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logic [7:0] gm2_0_out;
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logic [7:0] gm4_0_out;
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// Sub-Modules for sub-Galois operations
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gm4 gm4_0 (.gm4_in(gm8_in), .gm4_out(gm4_0_out));
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gm2 gm2_0 (.gm2_in(gm4_0_out), .gm2_out(gm2_0_out));
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// Assign output to gm2 output
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assign gm8_out = gm2_0_out;
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endmodule
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module gm9 (gm9_in, gm9_out);
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input logic [7:0] gm9_in;
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output logic [7:0] gm9_out;
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// Internal Logic
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logic [7:0] gm8_0_out;
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// Sub-Modules for sub-Galois operations
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gm8 gm8_0 (.gm8_in(gm9_in), .gm8_out(gm8_0_out));
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// Set output to gm8(in) ^ in
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assign gm9_out = gm8_0_out ^ gm9_in;
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endmodule
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module gm11 (gm11_in, gm11_out);
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input logic [7:0] gm11_in;
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output logic [7:0] gm11_out;
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// Internal Logic
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logic [7:0] gm8_0_out;
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logic [7:0] gm2_0_out;
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// Sub-Modules for sub-Galois operations
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gm8 gm8_0 (.gm8_in(gm11_in), .gm8_out(gm8_0_out));
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gm2 gm2_0 (.gm2_in(gm11_in), .gm2_out(gm2_0_out));
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// Set output to gm8(in) ^ gm2(in) ^ in
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assign gm11_out = gm8_0_out ^ gm2_0_out ^ gm11_in;
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endmodule
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module gm13 (gm13_in, gm13_out);
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input logic [7:0] gm13_in;
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output logic [7:0] gm13_out;
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// Internal Logic
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logic [7:0] gm8_0_out;
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logic [7:0] gm4_0_out;
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// Sub-Modules for sub-Galois operations
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gm8 gm8_0 (.gm8_in(gm13_in), .gm8_out(gm8_0_out));
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gm4 gm4_0 (.gm4_in(gm13_in), .gm4_out(gm4_0_out));
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// Set output to gm8(in) ^ gm4(in) ^ in
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assign gm13_out = gm8_0_out ^ gm4_0_out ^ gm13_in;
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endmodule
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module gm14 (gm14_in, gm14_out);
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input logic [7:0] gm14_in;
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output logic [7:0] gm14_out;
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// Internal Logic
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logic [7:0] gm8_0_out;
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logic [7:0] gm4_0_out;
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logic [7:0] gm2_0_out;
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// Sub-Modules for sub-Galois operations
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gm8 gm8_0 (.gm8_in(gm14_in), .gm8_out(gm8_0_out));
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gm4 gm4_0 (.gm4_in(gm14_in), .gm4_out(gm4_0_out));
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gm2 gm2_0 (.gm2_in(gm14_in), .gm2_out(gm2_0_out));
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//Assign output to gm8(in) ^ gm4(in) ^ gm2(in)
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assign gm14_out = gm8_0_out ^ gm4_0_out ^ gm2_0_out;
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endmodule
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44
src/ieu/aes_common/gm11.sv
Normal file
44
src/ieu/aes_common/gm11.sv
Normal file
@ -0,0 +1,44 @@
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///////////////////////////////////////////
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// gm11.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
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// Purpose: Galois field operations for mix columns operation
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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// https://github.com/openhwgroup/cvw
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//
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module gm11 (gm11_in, gm11_out);
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input logic [7:0] gm11_in;
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output logic [7:0] gm11_out;
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// Internal Logic
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logic [7:0] gm8_0_out;
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logic [7:0] gm2_0_out;
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// Sub-Modules for sub-Galois operations
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gm8 gm8_0 (.gm8_in(gm11_in), .gm8_out(gm8_0_out));
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gm2 gm2_0 (.gm2_in(gm11_in), .gm2_out(gm2_0_out));
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// Set output to gm8(in) ^ gm2(in) ^ in
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assign gm11_out = gm8_0_out ^ gm2_0_out ^ gm11_in;
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endmodule
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44
src/ieu/aes_common/gm13.sv
Normal file
44
src/ieu/aes_common/gm13.sv
Normal file
@ -0,0 +1,44 @@
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///////////////////////////////////////////
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// gm13.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
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// Purpose: Galois field operations for mix columns operation
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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// https://github.com/openhwgroup/cvw
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//
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module gm13 (gm13_in, gm13_out);
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input logic [7:0] gm13_in;
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output logic [7:0] gm13_out;
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// Internal Logic
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logic [7:0] gm8_0_out;
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logic [7:0] gm4_0_out;
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// Sub-Modules for sub-Galois operations
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gm8 gm8_0 (.gm8_in(gm13_in), .gm8_out(gm8_0_out));
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gm4 gm4_0 (.gm4_in(gm13_in), .gm4_out(gm4_0_out));
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// Set output to gm8(in) ^ gm4(in) ^ in
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assign gm13_out = gm8_0_out ^ gm4_0_out ^ gm13_in;
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endmodule
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47
src/ieu/aes_common/gm14.sv
Normal file
47
src/ieu/aes_common/gm14.sv
Normal file
@ -0,0 +1,47 @@
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///////////////////////////////////////////
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// gm14.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
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// Purpose: Galois field operations for mix columns operation
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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// https://github.com/openhwgroup/cvw
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//
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module gm14 (gm14_in, gm14_out);
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input logic [7:0] gm14_in;
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output logic [7:0] gm14_out;
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// Internal Logic
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logic [7:0] gm8_0_out;
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logic [7:0] gm4_0_out;
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logic [7:0] gm2_0_out;
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// Sub-Modules for sub-Galois operations
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gm8 gm8_0 (.gm8_in(gm14_in), .gm8_out(gm8_0_out));
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gm4 gm4_0 (.gm4_in(gm14_in), .gm4_out(gm4_0_out));
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gm2 gm2_0 (.gm2_in(gm14_in), .gm2_out(gm2_0_out));
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//Assign output to gm8(in) ^ gm4(in) ^ gm2(in)
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assign gm14_out = gm8_0_out ^ gm4_0_out ^ gm2_0_out;
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endmodule
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36
src/ieu/aes_common/gm2.sv
Normal file
36
src/ieu/aes_common/gm2.sv
Normal file
@ -0,0 +1,36 @@
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///////////////////////////////////////////
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// gm2.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
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// Purpose: Galois field operations for mix columns operation
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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// https://github.com/openhwgroup/cvw
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//
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
|
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
|
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// may obtain a copy of the License at
|
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//
|
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// https://solderpad.org/licenses/SHL-2.1/
|
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
|
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
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// either express or implied. See the License for the specific language governing permissions
|
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// and limitations under the License.
|
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////////////////////////////////////////////////////////////////////////////////////////////////
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module gm2 (gm2_in, gm2_out);
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input logic [7:0] gm2_in;
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output logic [7:0] gm2_out;
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// Set output to Galois Mult 2
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assign gm2_out = {gm2_in[6:0], 1'b0} ^ (8'h1b & {8{gm2_in[7]}});
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endmodule
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42
src/ieu/aes_common/gm3.sv
Normal file
42
src/ieu/aes_common/gm3.sv
Normal file
@ -0,0 +1,42 @@
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///////////////////////////////////////////
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// gm3.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
|
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// Purpose: Galois field operations for mix columns operation
|
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//
|
||||
// A component of the CORE-V-WALLY configurable RISC-V project.
|
||||
// https://github.com/openhwgroup/cvw
|
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//
|
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
|
||||
// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
|
||||
// except in compliance with the License, or, at your option, the Apache License version 2.0. You
|
||||
// may obtain a copy of the License at
|
||||
//
|
||||
// https://solderpad.org/licenses/SHL-2.1/
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, any work distributed under the
|
||||
// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
||||
// either express or implied. See the License for the specific language governing permissions
|
||||
// and limitations under the License.
|
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////////////////////////////////////////////////////////////////////////////////////////////////
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module gm3 (gm3_in, gm3_out);
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input logic [7:0] gm3_in;
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output logic [7:0] gm3_out;
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// Internal Logic
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logic [7:0] gm2_0_out;
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// Sub-Modules for gm2 multiplication
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gm2 gm2_0 (.gm2_in(gm3_in), .gm2_out(gm2_0_out));
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// Assign Output
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assign gm3_out = gm2_0_out ^ gm3_in;
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endmodule
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44
src/ieu/aes_common/gm4.sv
Normal file
44
src/ieu/aes_common/gm4.sv
Normal file
@ -0,0 +1,44 @@
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///////////////////////////////////////////
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// gm4.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
|
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// Purpose: Galois field operations for mix columns operation
|
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//
|
||||
// A component of the CORE-V-WALLY configurable RISC-V project.
|
||||
// https://github.com/openhwgroup/cvw
|
||||
//
|
||||
// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
|
||||
//
|
||||
// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
|
||||
// except in compliance with the License, or, at your option, the Apache License version 2.0. You
|
||||
// may obtain a copy of the License at
|
||||
//
|
||||
// https://solderpad.org/licenses/SHL-2.1/
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, any work distributed under the
|
||||
// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
||||
// either express or implied. See the License for the specific language governing permissions
|
||||
// and limitations under the License.
|
||||
////////////////////////////////////////////////////////////////////////////////////////////////
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module gm4 (gm4_in, gm4_out);
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input logic [7:0] gm4_in;
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output logic [7:0] gm4_out;
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// Internal Logic
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logic [7:0] gm2_0_out;
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logic [7:0] gm2_1_out;
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// Sub-Modules for multiple gm2 multiplications
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gm2 gm2_0 (.gm2_in(gm4_in), .gm2_out(gm2_0_out));
|
||||
gm2 gm2_1 (.gm2_in(gm2_0_out), .gm2_out(gm2_1_out));
|
||||
|
||||
// Assign output to second gm2 output
|
||||
assign gm4_out = gm2_1_out;
|
||||
|
||||
endmodule
|
||||
44
src/ieu/aes_common/gm8.sv
Normal file
44
src/ieu/aes_common/gm8.sv
Normal file
@ -0,0 +1,44 @@
|
||||
///////////////////////////////////////////
|
||||
// gm8.sv
|
||||
//
|
||||
// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
|
||||
// Created: 20 February 2024
|
||||
//
|
||||
// Purpose: Galois field operations for mix columns operation
|
||||
//
|
||||
// A component of the CORE-V-WALLY configurable RISC-V project.
|
||||
// https://github.com/openhwgroup/cvw
|
||||
//
|
||||
// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
|
||||
//
|
||||
// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
|
||||
// except in compliance with the License, or, at your option, the Apache License version 2.0. You
|
||||
// may obtain a copy of the License at
|
||||
//
|
||||
// https://solderpad.org/licenses/SHL-2.1/
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, any work distributed under the
|
||||
// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
||||
// either express or implied. See the License for the specific language governing permissions
|
||||
// and limitations under the License.
|
||||
////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
module gm8 (gm8_in, gm8_out);
|
||||
|
||||
input logic [7:0] gm8_in;
|
||||
output logic [7:0] gm8_out;
|
||||
|
||||
// Internal Logic
|
||||
logic [7:0] gm2_0_out;
|
||||
logic [7:0] gm4_0_out;
|
||||
|
||||
// Sub-Modules for sub-Galois operations
|
||||
gm4 gm4_0 (.gm4_in(gm8_in), .gm4_out(gm4_0_out));
|
||||
gm2 gm2_0 (.gm2_in(gm4_0_out), .gm2_out(gm2_0_out));
|
||||
|
||||
// Assign output to gm2 output
|
||||
assign gm8_out = gm2_0_out;
|
||||
|
||||
endmodule
|
||||
42
src/ieu/aes_common/gm9.sv
Normal file
42
src/ieu/aes_common/gm9.sv
Normal file
@ -0,0 +1,42 @@
|
||||
///////////////////////////////////////////
|
||||
// gm9.sv
|
||||
//
|
||||
// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
|
||||
// Created: 20 February 2024
|
||||
//
|
||||
// Purpose: Galois field operations for mix columns operation
|
||||
//
|
||||
// A component of the CORE-V-WALLY configurable RISC-V project.
|
||||
// https://github.com/openhwgroup/cvw
|
||||
//
|
||||
// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
|
||||
//
|
||||
// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
|
||||
// except in compliance with the License, or, at your option, the Apache License version 2.0. You
|
||||
// may obtain a copy of the License at
|
||||
//
|
||||
// https://solderpad.org/licenses/SHL-2.1/
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, any work distributed under the
|
||||
// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
||||
// either express or implied. See the License for the specific language governing permissions
|
||||
// and limitations under the License.
|
||||
////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
module gm9 (gm9_in, gm9_out);
|
||||
|
||||
input logic [7:0] gm9_in;
|
||||
output logic [7:0] gm9_out;
|
||||
|
||||
// Internal Logic
|
||||
logic [7:0] gm8_0_out;
|
||||
|
||||
// Sub-Modules for sub-Galois operations
|
||||
gm8 gm8_0 (.gm8_in(gm9_in), .gm8_out(gm8_0_out));
|
||||
|
||||
// Set output to gm8(in) ^ in
|
||||
assign gm9_out = gm8_0_out ^ gm9_in;
|
||||
|
||||
endmodule
|
||||
Loading…
Reference in New Issue
Block a user