From d66a613074f609962cc56506fd0ccfdd5c6bcdeb Mon Sep 17 00:00:00 2001 From: Huda-10xe Date: Mon, 28 Oct 2024 00:32:07 -0700 Subject: [PATCH 01/11] Renaming VM Coverage --- config/rv32gc/coverage.svh | 3 ++- config/rv64gc/coverage.svh | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/config/rv32gc/coverage.svh b/config/rv32gc/coverage.svh index 3a04643ad..415722efc 100644 --- a/config/rv32gc/coverage.svh +++ b/config/rv32gc/coverage.svh @@ -13,4 +13,5 @@ `include "RV32Zca_coverage.svh" `include "RV32Zcb_coverage.svh" `include "RV32ZcbM_coverage.svh" -`include "RV32ZcbZbb_coverage.svh" \ No newline at end of file +`include "RV32ZcbZbb_coverage.svh" +`include "VM_coverage.svh" \ No newline at end of file diff --git a/config/rv64gc/coverage.svh b/config/rv64gc/coverage.svh index 5b11b5a22..ed337a4ac 100644 --- a/config/rv64gc/coverage.svh +++ b/config/rv64gc/coverage.svh @@ -9,7 +9,7 @@ `include "RV64M_coverage.svh" `include "RV64F_coverage.svh" `include "RV64Zfh_coverage.svh" -`include "RV64VM_coverage.svh" +`include "VM_coverage.svh" `include "RV64VM_PMP_coverage.svh" `include "RV64CBO_VM_coverage.svh" `include "RV64CBO_PMP_coverage.svh" From 3f94fc3ca245604e71d0f8537127749cfc1bf8e9 Mon Sep 17 00:00:00 2001 From: Huda-10xe Date: Tue, 29 Oct 2024 03:13:53 -0700 Subject: [PATCH 02/11] Changing VM covergae name to incorporate sv32 coverpoints --- config/rv64gc/coverage.svh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/config/rv64gc/coverage.svh b/config/rv64gc/coverage.svh index 20d5108d6..4e863b288 100644 --- a/config/rv64gc/coverage.svh +++ b/config/rv64gc/coverage.svh @@ -21,7 +21,7 @@ `include "RV64Zcd_coverage.svh" // Privileged extensions -`include "RVVM_coverage.svh" +`include "VM_coverage.svh" `include "ZicsrM_coverage.svh" // `include "RV64VM_PMP_coverage.svh" // `include "RV64CBO_VM_coverage.svh" From 8515c20c158c02e5202a753e565a38b690703e10 Mon Sep 17 00:00:00 2001 From: Huda-10xe Date: Tue, 29 Oct 2024 04:25:02 -0700 Subject: [PATCH 03/11] Removing VM_Covergae from this till its complete --- config/rv32gc/coverage.svh | 1 - 1 file changed, 1 deletion(-) diff --git a/config/rv32gc/coverage.svh b/config/rv32gc/coverage.svh index 96362fdf3..217e8788a 100644 --- a/config/rv32gc/coverage.svh +++ b/config/rv32gc/coverage.svh @@ -22,4 +22,3 @@ // Privileged extensions `include "ZicsrM_coverage.svh" -`include "VM_coverage.svh" From 896bb21f7c7d839904c20df5510e7fa49899fbd7 Mon Sep 17 00:00:00 2001 From: Rose Thompson Date: Tue, 29 Oct 2024 09:58:53 -0500 Subject: [PATCH 04/11] Added potential test. btbthrash forces jump and divide instructions to occupy the same location in the btb. Instruction class prediction mispredicts ever time. This is useful incase someone changes the hazard code or fpu. --- tests/coverage/btbthrash.S | 145 +++++++++++++++++++++++++++++++++++++ 1 file changed, 145 insertions(+) create mode 100644 tests/coverage/btbthrash.S diff --git a/tests/coverage/btbthrash.S b/tests/coverage/btbthrash.S new file mode 100644 index 000000000..8fedf372a --- /dev/null +++ b/tests/coverage/btbthrash.S @@ -0,0 +1,145 @@ +/////////////////////////////////////////// +// btbtrash.S +// +// Written: Rose Thompson rose@rosethompson.net 23 October 2024 +// +// Purpose: Test the branch target buffer alias with divide and cache pipeline stalls +// +// A component of the CORE-V-WALLY configurable RISC-V project. +// https://github.com/openhwgroup/cvw +// +// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University +// +// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 +// +// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file +// except in compliance with the License, or, at your option, the Apache License version 2.0. You +// may obtain a copy of the License at +// +// https://solderpad.org/licenses/SHL-2.1/ +// +// Unless required by applicable law or agreed to in writing, any work distributed under the +// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +// either express or implied. See the License for the specific language governing permissions +// and limitations under the License. +//////////////////////////////////////////////////////////////////////////////////////////////// + +// load code to initalize stack, handle interrupts, terminate +#include "WALLY-init-lib.h" + +main: + + # Division test (having trouble with buildroot) + li x1, 1938759018 + li x2, 3745029 + li x3, 458 + li x4, 29587209347 + li x5, 28957 + li x6, 298 + li x7, 238562 + li x8, 198674 + li x9, 134 + li x10, 906732 + li x11, 29 + li x12, 50912 + li x13, 59 + li x14, 6902385 + li x15, 1923857 + li x16, 3985 + li x17, 3947 + li x18, 15984 + li x19, 5 + li x20, 9684658489 + li x21, 6548 + li x22, 3564 + li x23, 94 + li x24, 689464 + li x25, 42567 + li x26, 98453 + li x27, 648 + li x28, 984 + li x29, 6984 + li x30, 864 + + # x31 will be our loop counter + li x31, 4 + +.align 12 +jump1: + divuw x0, x1, x2 + j jump3 +jump4: + divuw x0, x5, x6 + j jump5 +jump6: + divuw x0, x10, x9 + j jump7 +jump8: + divuw x0, x14, x3 + j jump9 +jump10: + divuw x0, x18, x17 + j jump11 +jump12: + divuw x0, x21, x22 + j jump13 +jump14: + divuw x0, x24, x25 + j jump15 +jump16: + divuw x0, x29, x28 + j jump17 +jump18: + divuw x0, x1, x30 + j jump19 +jump20: + divuw x0, x3, x19 + j jump21 +jump22: + divuw x0, x12, x13 + j jump23 + +.align 12 # size of the 1024 btb apart +jump2: + j jump1 +jump3: + divuw x0, x4, x3 + j jump4 +jump5: + divuw x0, x7, x8 + j jump6 +jump7: + divuw x0, x12, x11 + j jump8 +jump9: + divuw x0, x15, x16 + j jump10 +jump11: + divuw x0, x20, x19 + j jump12 +jump13: + divuw x0, x24, x23 + j jump14 +jump15: + divuw x0, x26, x27 + j jump16 +jump17: + divuw x0, x29, x30 + j jump18 +jump19: + divuw x0, x2, x3 + j jump20 +jump21: + divuw x0, x4, x5 + j jump22 +jump23: + divuw x0, x20, x21 + #j jump22 + + fence.i + + addi x31, x31, -1 + bne x31, x0, jump1 +finsihed: + j done + From af74635216eeca9dca33d49c25b7a9206f23a71c Mon Sep 17 00:00:00 2001 From: Huda-10xe Date: Tue, 29 Oct 2024 09:44:18 -0700 Subject: [PATCH 05/11] reverting VM to RV64VM --- config/rv64gc/coverage.svh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/config/rv64gc/coverage.svh b/config/rv64gc/coverage.svh index 4e863b288..0491b4ab3 100644 --- a/config/rv64gc/coverage.svh +++ b/config/rv64gc/coverage.svh @@ -21,7 +21,7 @@ `include "RV64Zcd_coverage.svh" // Privileged extensions -`include "VM_coverage.svh" +`include "RV64VM_coverage.svh" `include "ZicsrM_coverage.svh" // `include "RV64VM_PMP_coverage.svh" // `include "RV64CBO_VM_coverage.svh" From 7405456de5da940621b79f32a3f0e0ed7fc5c0b7 Mon Sep 17 00:00:00 2001 From: Rose Thompson Date: Tue, 29 Oct 2024 15:47:24 -0500 Subject: [PATCH 06/11] added script to install libncurses5 and libtinfo5 for ubuntu24.04. --- bin/vivado-ubuntu24.04-libs.sh | 52 ++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100755 bin/vivado-ubuntu24.04-libs.sh diff --git a/bin/vivado-ubuntu24.04-libs.sh b/bin/vivado-ubuntu24.04-libs.sh new file mode 100755 index 000000000..29a0f1671 --- /dev/null +++ b/bin/vivado-ubuntu24.04-libs.sh @@ -0,0 +1,52 @@ +#!/bin/bash + +# Rose Thompson rose@rosethompson.net +# Oct 29, 2024 +# Downloads libncurses5 and libtinfo5 from ubuntu 22.04, extracts the libraries and installs to the system. Requires root. + +# A component of the CORE-V-WALLY configurable RISC-V project. +# https://github.com/openhwgroup/cvw +# +# Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University +# +# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 +# +# Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file +# except in compliance with the License, or, at your option, the Apache License version 2.0. You +# may obtain a copy of the License at +# +# https://solderpad.org/licenses/SHL-2.1/ +# +# Unless required by applicable law or agreed to in writing, any work distributed under the +# License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific language governing permissions +# and limitations under the License. + +TmpDir=$(mktemp -d ) +echo $TmpDir + +cd $TmpDir + +wget http://security.ubuntu.com/ubuntu/pool/universe/n/ncurses/libtinfo5_6.3-2ubuntu0.1_amd64.deb +wget http://security.ubuntu.com/ubuntu/pool/universe/n/ncurses/libncurses5_6.3-2ubuntu0.1_amd64.deb + +dpkg-deb -xv libtinfo5_6.3-2ubuntu0.1_amd64.deb ./libtinfo5 +dpkg-deb -xv libncurses5_6.3-2ubuntu0.1_amd64.deb ./libncurses5 + +echo "Installing libraries." +sudo cp libncurses5/lib/x86_64-linux-gnu/* /usr/lib/x86_64-linux-gnu/ +sudo cp libncurses5/usr/lib/x86_64-linux-gnu/* /usr/lib/x86_64-linux-gnu/ +sudo cp libtinfo5/lib/x86_64-linux-gnu/* /usr/lib/x86_64-linux-gnu/ +sudo cp libtinfo5/usr/lib/x86_64-linux-gnu/* /usr/lib/x86_64-linux-gnu/ +sudo cp -r libtinfo5/usr/share/doc/* /usr/share/doc/ +sudo ln -f -s /usr/share/doc/libtinfo5/ /usr/share/doc/libncurses5 + +cd - + +echo "Removing temporary files." +rm -rf $TmpDir + +echo "Finished." + + + From 57d1709582726e66c5c6dbd645e6e8e4e2e06f33 Mon Sep 17 00:00:00 2001 From: Rose Thompson Date: Wed, 30 Oct 2024 16:01:11 -0500 Subject: [PATCH 07/11] The path to the zsbl was wrong all this time, but for reason was working with older versions of Ubuntu, but one 24.04 it causes vivado to not find the rom and ram. --- fpga/constraints/marked_debug.txt | 19 +++++++++++++++++++ fpga/constraints/small-debug-spi.xdc | 1 - fpga/generator/Makefile | 4 ++-- fpga/generator/wally.tcl | 3 ++- 4 files changed, 23 insertions(+), 4 deletions(-) diff --git a/fpga/constraints/marked_debug.txt b/fpga/constraints/marked_debug.txt index 1d23c29a2..a50091827 100644 --- a/fpga/constraints/marked_debug.txt +++ b/fpga/constraints/marked_debug.txt @@ -5,3 +5,22 @@ wally/wallypipelinedcore.sv: logic InstrM lsu/lsu.sv: logic IEUAdrM lsu/lsu.sv: logic MemRWM mmu/hptw.sv: logic SATP_REGW +uncore/spi_apb.sv: logic ShiftIn +uncore/spi_apb.sv: logic ReceiveShiftReg +uncore/spi_apb.sv: logic SCLKenable +uncore/spi_apb.sv: logic SampleEdge +uncore/spi_apb.sv: logic Active +uncore/spi_apb.sv: statetype state +uncore/spi_apb.sv: typedef rsrstatetype +uncore/spi_apb.sv: logic SPICLK +uncore/spi_apb.sv: logic SPIOut +uncore/spi_apb.sv: logic SPICS +uncore/spi_apb.sv: logic SckMode +uncore/spi_apb.sv: logic SckDiv +uncore/spi_apb.sv: logic ShiftEdge +uncore/spi_apb.sv: logic TransmitShiftRegLoad +uncore/spi_apb.sv: logic TransmitShiftReg +uncore/spi_apb.sv: logic TransmitData +uncore/spi_apb.sv: logic ReceiveData +uncore/spi_apb.sv: logic ReceiveShiftRegEndian +uncore/spi_apb.sv: logic ASR diff --git a/fpga/constraints/small-debug-spi.xdc b/fpga/constraints/small-debug-spi.xdc index f62e3d4d3..5951bdcb8 100644 --- a/fpga/constraints/small-debug-spi.xdc +++ b/fpga/constraints/small-debug-spi.xdc @@ -191,7 +191,6 @@ set_property port_width 1 [get_debug_ports u_ila_0/probe33] set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe33] connect_debug_port u_ila_0/probe33 [get_nets [list {wallypipelinedsoc/uncoregen.uncore/sdc.sdc/TransmitFIFOReadEmpty} ]] - # the debug hub has issues with the clocks from the mmcm so lets give up an connect to the 100Mhz input clock. #connect_debug_port dbg_hub/clk [get_nets default_100mhz_clk] connect_debug_port dbg_hub/clk [get_nets CPUCLK] diff --git a/fpga/generator/Makefile b/fpga/generator/Makefile index 7ffd9f163..52e46ec38 100644 --- a/fpga/generator/Makefile +++ b/fpga/generator/Makefile @@ -69,8 +69,8 @@ PreProcessFiles: ./insert_debug_comment.sh # This line allows the Bootloader to be loaded in a Block RAM on the FPGA sed -i "s/bit \[DATA_WIDTH-1:0\].*ROM.*/(\* rom_style=\"block\" \*) &/g" ../src/CopiedFiles_do_not_add_to_repo/generic/mem/rom1p1r.sv - sed -i 's/$$WALLY/\.\.\/\.\.\/\.\.\//g' ../src/CopiedFiles_do_not_add_to_repo/generic/mem/rom1p1r.sv - sed -i 's/$$WALLY/\.\.\/\.\.\/\.\.\//g' ../src/CopiedFiles_do_not_add_to_repo/generic/mem/ram1p1rwbe.sv + sed -i 's/$$WALLY/\.\.\/\.\.\//g' ../src/CopiedFiles_do_not_add_to_repo/generic/mem/rom1p1r.sv + sed -i 's/$$WALLY/\.\.\/\.\.\//g' ../src/CopiedFiles_do_not_add_to_repo/generic/mem/ram1p1rwbe.sv # build the Zero stage boot loader (ZSBL) .PHONY: zsbl diff --git a/fpga/generator/wally.tcl b/fpga/generator/wally.tcl index 3ca0c3360..7935b5913 100644 --- a/fpga/generator/wally.tcl +++ b/fpga/generator/wally.tcl @@ -102,7 +102,8 @@ if {$board=="ArtyA7"} { } else { #source ../constraints/vcu-small-debug.xdc #source ../constraints/small-debug.xdc - source ../constraints/small-debug-spi.xdc + #source ../constraints/small-debug.xdc + source ../constraints/big-debug-spi.xdc } From 1629eda6088fd3d4f916f6aed288941eaaeb144f Mon Sep 17 00:00:00 2001 From: Rose Thompson Date: Wed, 30 Oct 2024 16:07:05 -0500 Subject: [PATCH 08/11] Added btbthrash to tests.vh. --- testbench/tests.vh | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/testbench/tests.vh b/testbench/tests.vh index bef41ef22..2b8d3a2ec 100644 --- a/testbench/tests.vh +++ b/testbench/tests.vh @@ -72,7 +72,8 @@ string coverage64gc[] = '{ "pmpcfg2", "pmppriority", "pmpcbo", - "pmpadrdecs" + "pmpadrdecs", + "btbthrash" }; string buildroot[] = '{ From 9400a2aba419d83c39e62ab0e80daf6292059d9e Mon Sep 17 00:00:00 2001 From: Rose Thompson Date: Wed, 30 Oct 2024 17:20:53 -0500 Subject: [PATCH 09/11] Remove vivavdo-ubuntu24.04-04-lib.sh because Jordan found a better solution by symlinking the new libncurses6 and libtinfo6 to the old libraries. --- bin/vivado-ubuntu24.04-libs.sh | 52 ---------------------------------- 1 file changed, 52 deletions(-) delete mode 100755 bin/vivado-ubuntu24.04-libs.sh diff --git a/bin/vivado-ubuntu24.04-libs.sh b/bin/vivado-ubuntu24.04-libs.sh deleted file mode 100755 index 29a0f1671..000000000 --- a/bin/vivado-ubuntu24.04-libs.sh +++ /dev/null @@ -1,52 +0,0 @@ -#!/bin/bash - -# Rose Thompson rose@rosethompson.net -# Oct 29, 2024 -# Downloads libncurses5 and libtinfo5 from ubuntu 22.04, extracts the libraries and installs to the system. Requires root. - -# A component of the CORE-V-WALLY configurable RISC-V project. -# https://github.com/openhwgroup/cvw -# -# Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University -# -# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 -# -# Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file -# except in compliance with the License, or, at your option, the Apache License version 2.0. You -# may obtain a copy of the License at -# -# https://solderpad.org/licenses/SHL-2.1/ -# -# Unless required by applicable law or agreed to in writing, any work distributed under the -# License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, -# either express or implied. See the License for the specific language governing permissions -# and limitations under the License. - -TmpDir=$(mktemp -d ) -echo $TmpDir - -cd $TmpDir - -wget http://security.ubuntu.com/ubuntu/pool/universe/n/ncurses/libtinfo5_6.3-2ubuntu0.1_amd64.deb -wget http://security.ubuntu.com/ubuntu/pool/universe/n/ncurses/libncurses5_6.3-2ubuntu0.1_amd64.deb - -dpkg-deb -xv libtinfo5_6.3-2ubuntu0.1_amd64.deb ./libtinfo5 -dpkg-deb -xv libncurses5_6.3-2ubuntu0.1_amd64.deb ./libncurses5 - -echo "Installing libraries." -sudo cp libncurses5/lib/x86_64-linux-gnu/* /usr/lib/x86_64-linux-gnu/ -sudo cp libncurses5/usr/lib/x86_64-linux-gnu/* /usr/lib/x86_64-linux-gnu/ -sudo cp libtinfo5/lib/x86_64-linux-gnu/* /usr/lib/x86_64-linux-gnu/ -sudo cp libtinfo5/usr/lib/x86_64-linux-gnu/* /usr/lib/x86_64-linux-gnu/ -sudo cp -r libtinfo5/usr/share/doc/* /usr/share/doc/ -sudo ln -f -s /usr/share/doc/libtinfo5/ /usr/share/doc/libncurses5 - -cd - - -echo "Removing temporary files." -rm -rf $TmpDir - -echo "Finished." - - - From f258384596fd2975f14d3e6f0f86ebc4fb44ba52 Mon Sep 17 00:00:00 2001 From: Huda-10xe Date: Fri, 1 Nov 2024 06:07:49 -0700 Subject: [PATCH 10/11] Adding sv32 coverpoins --- config/rv32gc/coverage.svh | 2 ++ sim/questa/wally.do | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/config/rv32gc/coverage.svh b/config/rv32gc/coverage.svh index 2eb52541f..97496a8b9 100644 --- a/config/rv32gc/coverage.svh +++ b/config/rv32gc/coverage.svh @@ -25,3 +25,5 @@ // Privileged extensions `include "ZicsrM_coverage.svh" +`include "RV32VM_coverage.svh" +`include "RV32VM_PMP_coverage.svh" diff --git a/sim/questa/wally.do b/sim/questa/wally.do index a53a0e3c7..c692b06e1 100644 --- a/sim/questa/wally.do +++ b/sim/questa/wally.do @@ -181,7 +181,7 @@ if {$DEBUG > 0} { # suppress spurious warnngs about # "Extra checking for conflicts with always_comb done at vopt time" # because vsim will run vopt -set INC_DIRS "+incdir+${CONFIG}/${CFG} +incdir+${CONFIG}/deriv/${CFG} +incdir+${CONFIG}/shared +incdir+${FCRVVI} +incdir+${FCRVVI}/rv32 +incdir+${FCRVVI}/rv64 +incdir+${FCRVVI}/rv64_priv +incdir+${FCRVVI}/priv +incdir+${FCRVVI}/common +incdir+${FCRVVI}" +set INC_DIRS "+incdir+${CONFIG}/${CFG} +incdir+${CONFIG}/deriv/${CFG} +incdir+${CONFIG}/shared +incdir+${FCRVVI} +incdir+${FCRVVI}/rv32 +incdir+${FCRVVI}/rv64 +incdir+${FCRVVI}/rv64_priv +incdir+${FCRVVI}/priv +incdir+${FCRVVI}/rv32_priv +incdir+${FCRVVI}/common +incdir+${FCRVVI}" set SOURCES "${SRC}/cvw.sv ${TB}/${TESTBENCH}.sv ${TB}/common/*.sv ${SRC}/*/*.sv ${SRC}/*/*/*.sv ${WALLY}/addins/verilog-ethernet/*/*.sv ${WALLY}/addins/verilog-ethernet/*/*/*/*.sv" vlog -permissive -lint -work ${WKDIR} {*}${INC_DIRS} {*}${FCvlog} {*}${FCdefineCOVER_EXTS} {*}${lockstepvlog} {*}${SOURCES} -suppress 2282,2583,7053,7063,2596,13286 From 3fda7ecb81a2179aeb385daa6fbe9db30ccf492a Mon Sep 17 00:00:00 2001 From: naichewa Date: Fri, 1 Nov 2024 13:09:41 -0700 Subject: [PATCH 11/11] Fix SPI regression tests --- .../riscv-test-suite/rv32i_m/privilege/src/WALLY-spi-01.S | 2 +- .../riscv-test-suite/rv64i_m/privilege/src/WALLY-spi-01.S | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-spi-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-spi-01.S index a004a5ea0..94defaf87 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-spi-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-spi-01.S @@ -553,7 +553,7 @@ test_cases: # Test transmit watermark interrupt (triggers when entries in tx FIFO < tx watermark) without external enables SETUP_PLIC - +.4byte fmt, 0x00080000, write32_test # reset format register .4byte delay1, 0x0000001, write32_test # reset delay1 register .4byte cs_mode, 0x00000000, write32_test # reset cs_mode .4byte tx_mark, 0x00000001, write32_test # set transmit watermark to 1 (any entry turns mark off) diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-spi-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-spi-01.S index 0f189b5e6..23cfd169a 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-spi-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-spi-01.S @@ -564,7 +564,7 @@ test_cases: # Test transmit watermark interrupt (triggers when entries in tx FIFO < tx watermark) without external enables SETUP_PLIC - +.8byte fmt, 0x00080000, write32_test # reset format register .8byte delay1, 0x0000001, write32_test # reset delay1 register .8byte cs_mode, 0x00000000, write32_test # reset cs_mode .8byte sck_div, 0x00000100, write32_test # lower SPI clock rate so reads are done at correct time when ICACHE not supported