diff --git a/pipelined/src/ebu/ahblite.sv b/pipelined/src/ebu/ahblite.sv
index b49189a6e..adc3d2639 100644
--- a/pipelined/src/ebu/ahblite.sv
+++ b/pipelined/src/ebu/ahblite.sv
@@ -161,7 +161,7 @@ module ahblite (
  
   assign IFUBusHRDATA = HRDATA;
   assign LSUBusHRDATA = HRDATA;
-  assign IFUBusAck = HREADY & (BusState == INSTRREAD);
-  assign LSUBusAck = HREADY & ((BusState == MEMREAD) | (BusState == MEMWRITE));
+  assign IFUBusAck = (BusState == INSTRREAD) & (NextBusState != INSTRREAD); // *** these are wrong.
+  assign LSUBusAck = (BusState == MEMREAD) & (NextBusState != MEMREAD) | (BusState == MEMWRITE) & (NextBusState != MEMWRITE); // *** these are wrong.
 
 endmodule