diff --git a/src/lsu/subwordwrite.sv b/src/lsu/subwordwrite.sv
index f53f121e7..ad21b3c25 100644
--- a/src/lsu/subwordwrite.sv
+++ b/src/lsu/subwordwrite.sv
@@ -28,8 +28,8 @@
 ////////////////////////////////////////////////////////////////////////////////////////////////
 
 module subwordwrite #(parameter LLEN) (
-  input logic [2:0]          LSUFunct3M,
-  input logic [LLEN-1:0]    IMAFWriteDataM,
+  input logic  [2:0]        LSUFunct3M,
+  input logic  [LLEN-1:0]   IMAFWriteDataM,
   output logic [LLEN-1:0]   LittleEndianWriteDataM
 );
 
@@ -46,18 +46,18 @@ module subwordwrite #(parameter LLEN) (
   end else if (LLEN == 64) begin:sww
     always_comb 
       case(LSUFunct3M[1:0])
-        2'b00:  LittleEndianWriteDataM = {8{IMAFWriteDataM[7:0]}};  // sb
-        2'b01:  LittleEndianWriteDataM = {4{IMAFWriteDataM[15:0]}}; // sh
-        2'b10:  LittleEndianWriteDataM = {2{IMAFWriteDataM[31:0]}}; // sw
-        2'b11:  LittleEndianWriteDataM = IMAFWriteDataM;            // sd
+        2'b00:  LittleEndianWriteDataM = {8{IMAFWriteDataM[7:0]}};   // sb
+        2'b01:  LittleEndianWriteDataM = {4{IMAFWriteDataM[15:0]}};  // sh
+        2'b10:  LittleEndianWriteDataM = {2{IMAFWriteDataM[31:0]}};  // sw
+        2'b11:  LittleEndianWriteDataM = IMAFWriteDataM;             // sd
       endcase
   end else begin:sww // 32-bit
     always_comb 
       case(LSUFunct3M[1:0])
-        2'b00:  LittleEndianWriteDataM = {4{IMAFWriteDataM[7:0]}};  // sb
-        2'b01:  LittleEndianWriteDataM = {2{IMAFWriteDataM[15:0]}}; // sh
-        2'b10:  LittleEndianWriteDataM = IMAFWriteDataM;            // sw
-        default: LittleEndianWriteDataM = IMAFWriteDataM; // shouldn't happen
+        2'b00:  LittleEndianWriteDataM = {4{IMAFWriteDataM[7:0]}};   // sb
+        2'b01:  LittleEndianWriteDataM = {2{IMAFWriteDataM[15:0]}};  // sh
+        2'b10:  LittleEndianWriteDataM = IMAFWriteDataM;             // sw
+        default: LittleEndianWriteDataM = IMAFWriteDataM;            // shouldn't happen
       endcase
   end
 endmodule