From 3263f5da778a2fbe65a72c3226c56c6e951603bf Mon Sep 17 00:00:00 2001 From: bbracker Date: Mon, 7 Feb 2022 23:59:47 +0000 Subject: [PATCH 1/2] trim away unneeded linker and header files intended for non-spike machines from wally-riscv-arch-test --- .../riscv-test-env/arch_test.h | 1 - .../riscv-test-env/encoding.h | 1 - .../riscv-test-env/p/link.ld | 22 -- .../riscv-test-env/p/riscv_test.h | 251 ---------------- .../riscv-test-env/pm/link.ld | 17 -- .../riscv-test-env/pm/riscv_test.h | 11 - .../riscv-test-env/pt/link.ld | 17 -- .../riscv-test-env/pt/riscv_test.h | 69 ----- .../riscv-test-env/v/entry.S | 125 -------- .../riscv-test-env/v/link.ld | 17 -- .../riscv-test-env/v/riscv_test.h | 71 ----- .../riscv-test-env/v/string.c | 114 -------- .../riscv-test-env/v/vm.c | 273 ------------------ 13 files changed, 989 deletions(-) delete mode 120000 tests/wally-riscv-arch-test/riscv-test-env/arch_test.h delete mode 120000 tests/wally-riscv-arch-test/riscv-test-env/encoding.h delete mode 100644 tests/wally-riscv-arch-test/riscv-test-env/p/link.ld delete mode 100644 tests/wally-riscv-arch-test/riscv-test-env/p/riscv_test.h delete mode 100644 tests/wally-riscv-arch-test/riscv-test-env/pm/link.ld delete mode 100644 tests/wally-riscv-arch-test/riscv-test-env/pm/riscv_test.h delete mode 100644 tests/wally-riscv-arch-test/riscv-test-env/pt/link.ld delete mode 100644 tests/wally-riscv-arch-test/riscv-test-env/pt/riscv_test.h delete mode 100644 tests/wally-riscv-arch-test/riscv-test-env/v/entry.S delete mode 100644 tests/wally-riscv-arch-test/riscv-test-env/v/link.ld delete mode 100644 tests/wally-riscv-arch-test/riscv-test-env/v/riscv_test.h delete mode 100644 tests/wally-riscv-arch-test/riscv-test-env/v/string.c delete mode 100644 tests/wally-riscv-arch-test/riscv-test-env/v/vm.c diff --git a/tests/wally-riscv-arch-test/riscv-test-env/arch_test.h b/tests/wally-riscv-arch-test/riscv-test-env/arch_test.h deleted file mode 120000 index c1b8c50bc..000000000 --- a/tests/wally-riscv-arch-test/riscv-test-env/arch_test.h +++ /dev/null @@ -1 +0,0 @@ -../riscv-test-suite/env/arch_test.h \ No newline at end of file diff --git a/tests/wally-riscv-arch-test/riscv-test-env/encoding.h b/tests/wally-riscv-arch-test/riscv-test-env/encoding.h deleted file mode 120000 index fd1833f03..000000000 --- a/tests/wally-riscv-arch-test/riscv-test-env/encoding.h +++ /dev/null @@ -1 +0,0 @@ -../riscv-test-suite/env/encoding.h \ No newline at end of file diff --git a/tests/wally-riscv-arch-test/riscv-test-env/p/link.ld b/tests/wally-riscv-arch-test/riscv-test-env/p/link.ld deleted file mode 100644 index 392e74f9e..000000000 --- a/tests/wally-riscv-arch-test/riscv-test-env/p/link.ld +++ /dev/null @@ -1,22 +0,0 @@ -OUTPUT_ARCH( "riscv" ) -ENTRY(_start) - -SECTIONS -{ - . = 0x00000000; - .text.trap : { *(.text.trap) } - - . = 0x80000000; - .text.init : { *(.text.init) } - - . = ALIGN(0x1000); - .tohost : { *(.tohost) } - . = ALIGN(0x1000); - .text : { *(.text) } - . = ALIGN(0x1000); - .data : { *(.data) } - .data.string : { *(.data.string)} - .bss : { *(.bss) } - _end = .; -} - diff --git a/tests/wally-riscv-arch-test/riscv-test-env/p/riscv_test.h b/tests/wally-riscv-arch-test/riscv-test-env/p/riscv_test.h deleted file mode 100644 index e452261c4..000000000 --- a/tests/wally-riscv-arch-test/riscv-test-env/p/riscv_test.h +++ /dev/null @@ -1,251 +0,0 @@ -// See LICENSE for license details. - -#ifndef _ENV_PHYSICAL_SINGLE_CORE_H -#define _ENV_PHYSICAL_SINGLE_CORE_H - -#include "../encoding.h" - -//----------------------------------------------------------------------- -// Begin Macro -//----------------------------------------------------------------------- - -#define RVTEST_RV64U \ - .macro init; \ - .endm - -#define RVTEST_RV64UF \ - .macro init; \ - RVTEST_FP_ENABLE; \ - .endm - -#define RVTEST_RV32U \ - .macro init; \ - .endm - -#define RVTEST_RV32UF \ - .macro init; \ - RVTEST_FP_ENABLE; \ - .endm - -#define RVTEST_RV64M \ - .macro init; \ - RVTEST_ENABLE_MACHINE; \ - .endm - -#define RVTEST_RV64S \ - .macro init; \ - RVTEST_ENABLE_SUPERVISOR; \ - .endm - -#define RVTEST_RV32M \ - .macro init; \ - RVTEST_ENABLE_MACHINE; \ - .endm - -#define RVTEST_RV32S \ - .macro init; \ - RVTEST_ENABLE_SUPERVISOR; \ - .endm - -#if __riscv_xlen == 64 -# define CHECK_XLEN li a0, 1; slli a0, a0, 31; bgez a0, 1f; RVTEST_PASS; 1: -#else -# define CHECK_XLEN li a0, 1; slli a0, a0, 31; bltz a0, 1f; RVTEST_PASS; 1: -#endif - -#define INIT_PMP \ - la t0, 1f; \ - csrw mtvec, t0; \ - li t0, -1; /* Set up a PMP to permit all accesses */ \ - csrw pmpaddr0, t0; \ - li t0, PMP_NAPOT | PMP_R | PMP_W | PMP_X; \ - csrw pmpcfg0, t0; \ - .align 2; \ -1: - -#define INIT_SATP \ - la t0, 1f; \ - csrw mtvec, t0; \ - csrwi satp, 0; \ - .align 2; \ -1: - -#define DELEGATE_NO_TRAPS \ - la t0, 1f; \ - csrw mtvec, t0; \ - csrwi medeleg, 0; \ - csrwi mideleg, 0; \ - csrwi mie, 0; \ - .align 2; \ -1: - -#define RVTEST_ENABLE_SUPERVISOR \ - li a0, MSTATUS_MPP & (MSTATUS_MPP >> 1); \ - csrs mstatus, a0; \ - li a0, SIP_SSIP | SIP_STIP; \ - csrs mideleg, a0; \ - -#define RVTEST_ENABLE_MACHINE \ - li a0, MSTATUS_MPP; \ - csrs mstatus, a0; \ - -#define RVTEST_FP_ENABLE \ - li a0, MSTATUS_FS & (MSTATUS_FS >> 1); \ - csrs mstatus, a0; \ - csrwi fcsr, 0 - -#define RISCV_MULTICORE_DISABLE \ - csrr a0, mhartid; \ - 1: bnez a0, 1b - -#define EXTRA_TVEC_USER -#define EXTRA_TVEC_MACHINE -#define EXTRA_INIT -#define EXTRA_INIT_TIMER - -// -// undefine some unusable CSR Accesses if no PRIV Mode present -// -#if defined(PRIV_MISA_S) -# if (PRIV_MISA_S==0) -# undef INIT_SATP -# define INIT_SATP -# undef INIT_PMP -# define INIT_PMP -# undef DELEGATE_NO_TRAPS -# define DELEGATE_NO_TRAPS -# undef RVTEST_ENABLE_SUPERVISOR -# define RVTEST_ENABLE_SUPERVISOR -# endif -#endif -#if defined(PRIV_MISA_U) -# if (PRIV_MISA_U==0) -# endif -#endif -#if defined(TRAPHANDLER) -#include TRAPHANDLER -#endif - -#define INTERRUPT_HANDLER j other_exception /* No interrupts should occur */ - -#define RVTEST_CODE_BEGIN_OLD \ - .section .text.init; \ - .align 6; \ - .weak stvec_handler; \ - .weak mtvec_handler; \ - .globl _start; \ -_start: \ - /* reset vector */ \ - j reset_vector; \ - .align 2; \ -trap_vector: \ - /* test whether the test came from pass/fail */ \ - csrr t5, mcause; \ - li t6, CAUSE_USER_ECALL; \ - beq t5, t6, write_tohost; \ - li t6, CAUSE_SUPERVISOR_ECALL; \ - beq t5, t6, write_tohost; \ - li t6, CAUSE_MACHINE_ECALL; \ - beq t5, t6, write_tohost; \ - /* if an mtvec_handler is defined, jump to it */ \ - la t5, mtvec_handler; \ - beqz t5, 1f; \ - jr t5; \ - /* was it an interrupt or an exception? */ \ - 1: csrr t5, mcause; \ - bgez t5, handle_exception; \ - INTERRUPT_HANDLER; \ -handle_exception: \ - /* we don't know how to handle whatever the exception was */ \ - other_exception: \ - /* some unhandlable exception occurred */ \ - 1: ori TESTNUM, TESTNUM, 1337; \ - write_tohost: \ - sw TESTNUM, tohost, t5; \ - j write_tohost; \ -reset_vector: \ - RISCV_MULTICORE_DISABLE; \ - INIT_SATP; \ - INIT_PMP; \ - DELEGATE_NO_TRAPS; \ - li TESTNUM, 0; \ - la t0, trap_vector; \ - csrw mtvec, t0; \ - CHECK_XLEN; \ - /* if an stvec_handler is defined, delegate exceptions to it */ \ - la t0, stvec_handler; \ - beqz t0, 1f; \ - csrw stvec, t0; \ - li t0, (1 << CAUSE_LOAD_PAGE_FAULT) | \ - (1 << CAUSE_STORE_PAGE_FAULT) | \ - (1 << CAUSE_FETCH_PAGE_FAULT) | \ - (1 << CAUSE_MISALIGNED_FETCH) | \ - (1 << CAUSE_USER_ECALL) | \ - (1 << CAUSE_BREAKPOINT); \ - csrw medeleg, t0; \ - csrr t1, medeleg; \ - bne t0, t1, other_exception; \ -1: csrwi mstatus, 0; \ - init; \ - EXTRA_INIT; \ - EXTRA_INIT_TIMER; \ - la t0, 1f; \ - csrw mepc, t0; \ - csrr a0, mhartid; \ - mret; \ -1: \ -begin_testcode: - - -//----------------------------------------------------------------------- -// End Macro -//----------------------------------------------------------------------- - -#define RVTEST_CODE_END_OLD \ -end_testcode: \ - ecall; - -//----------------------------------------------------------------------- -// Pass/Fail Macro -//----------------------------------------------------------------------- -#define RVTEST_SYNC fence -//#define RVTEST_SYNC nop - -#define RVTEST_PASS \ - RVTEST_SYNC; \ - li TESTNUM, 1; \ - SWSIG (0, TESTNUM); \ - ecall - -#define TESTNUM gp -#define RVTEST_FAIL \ - RVTEST_SYNC; \ -1: beqz TESTNUM, 1b; \ - sll TESTNUM, TESTNUM, 1; \ - or TESTNUM, TESTNUM, 1; \ - SWSIG (0, TESTNUM); \ - la x1, end_testcode; \ - jr x1; - -//----------------------------------------------------------------------- -// Data Section Macro -//----------------------------------------------------------------------- - -#define EXTRA_DATA - -#define RVTEST_DATA_BEGIN_OLD \ - .align 4; .global begin_signature; begin_signature: - -#define RVTEST_DATA_END_OLD \ - .align 4; .global end_signature; end_signature: \ - EXTRA_DATA \ - .pushsection .tohost,"aw",@progbits; \ - .align 8; .global tohost; tohost: .dword 0; \ - .align 8; .global fromhost; fromhost: .dword 0; \ - .popsection; \ - .align 8; .global begin_regstate; begin_regstate: \ - .word 128; \ - .align 8; .global end_regstate; end_regstate: \ - .word 4; - -#endif diff --git a/tests/wally-riscv-arch-test/riscv-test-env/pm/link.ld b/tests/wally-riscv-arch-test/riscv-test-env/pm/link.ld deleted file mode 100644 index b3e315e78..000000000 --- a/tests/wally-riscv-arch-test/riscv-test-env/pm/link.ld +++ /dev/null @@ -1,17 +0,0 @@ -OUTPUT_ARCH( "riscv" ) -ENTRY(_start) - -SECTIONS -{ - . = 0x80000000; - .text.init : { *(.text.init) } - . = ALIGN(0x1000); - .tohost : { *(.tohost) } - . = ALIGN(0x1000); - .text : { *(.text) } - . = ALIGN(0x1000); - .data : { *(.data) } - .bss : { *(.bss) } - _end = .; -} - diff --git a/tests/wally-riscv-arch-test/riscv-test-env/pm/riscv_test.h b/tests/wally-riscv-arch-test/riscv-test-env/pm/riscv_test.h deleted file mode 100644 index 38a0e86b8..000000000 --- a/tests/wally-riscv-arch-test/riscv-test-env/pm/riscv_test.h +++ /dev/null @@ -1,11 +0,0 @@ -// See LICENSE for license details. - -#ifndef _ENV_PHYSICAL_MULTI_CORE_H -#define _ENV_PHYSICAL_MULTI_CORE_H - -#include "../p/riscv_test.h" - -#undef RISCV_MULTICORE_DISABLE -#define RISCV_MULTICORE_DISABLE - -#endif diff --git a/tests/wally-riscv-arch-test/riscv-test-env/pt/link.ld b/tests/wally-riscv-arch-test/riscv-test-env/pt/link.ld deleted file mode 100644 index b3e315e78..000000000 --- a/tests/wally-riscv-arch-test/riscv-test-env/pt/link.ld +++ /dev/null @@ -1,17 +0,0 @@ -OUTPUT_ARCH( "riscv" ) -ENTRY(_start) - -SECTIONS -{ - . = 0x80000000; - .text.init : { *(.text.init) } - . = ALIGN(0x1000); - .tohost : { *(.tohost) } - . = ALIGN(0x1000); - .text : { *(.text) } - . = ALIGN(0x1000); - .data : { *(.data) } - .bss : { *(.bss) } - _end = .; -} - diff --git a/tests/wally-riscv-arch-test/riscv-test-env/pt/riscv_test.h b/tests/wally-riscv-arch-test/riscv-test-env/pt/riscv_test.h deleted file mode 100644 index 34c2a331a..000000000 --- a/tests/wally-riscv-arch-test/riscv-test-env/pt/riscv_test.h +++ /dev/null @@ -1,69 +0,0 @@ -// See LICENSE for license details. - -#ifndef _ENV_PHYSICAL_SINGLE_CORE_TIMER_H -#define _ENV_PHYSICAL_SINGLE_CORE_TIMER_H - -#include "../p/riscv_test.h" - -#define TIMER_INTERVAL 2 - -#undef EXTRA_INIT_TIMER -#define EXTRA_INIT_TIMER \ - li a0, MIP_MTIP; \ - csrs mie, a0; \ - csrr a0, mtime; \ - addi a0, a0, TIMER_INTERVAL; \ - csrw mtimecmp, a0; \ - -#if SSTATUS_XS != 0x18000 -# error -#endif -#define XS_SHIFT 15 - -#undef INTERRUPT_HANDLER -#define INTERRUPT_HANDLER \ - slli t5, t5, 1; \ - srli t5, t5, 1; \ - add t5, t5, -IRQ_M_TIMER; \ - bnez t5, other_exception; /* other interrups shouldn't happen */\ - csrr t5, mtime; \ - addi t5, t5, TIMER_INTERVAL; \ - csrw mtimecmp, t5; \ - mret; \ - -//----------------------------------------------------------------------- -// Data Section Macro -//----------------------------------------------------------------------- - -#undef EXTRA_DATA -#define EXTRA_DATA \ - .align 3; \ -regspill: \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ - .dword 0xdeadbeefcafebabe; \ -evac: \ - .skip 32768; \ - -#endif diff --git a/tests/wally-riscv-arch-test/riscv-test-env/v/entry.S b/tests/wally-riscv-arch-test/riscv-test-env/v/entry.S deleted file mode 100644 index 97196620f..000000000 --- a/tests/wally-riscv-arch-test/riscv-test-env/v/entry.S +++ /dev/null @@ -1,125 +0,0 @@ -#include "riscv_test.h" - -#if __riscv_xlen == 64 -# define STORE sd -# define LOAD ld -# define REGBYTES 8 -#else -# define STORE sw -# define LOAD lw -# define REGBYTES 4 -#endif - -#define STACK_TOP (_end + 4096) - - .section ".text.init","ax",@progbits - .globl _start -_start: - j handle_reset - - /* NMI vector */ -nmi_vector: - j wtf - -trap_vector: - j wtf - -handle_reset: - la t0, trap_vector - csrw mtvec, t0 - la sp, STACK_TOP - SIZEOF_TRAPFRAME_T - csrr t0, mhartid - slli t0, t0, 12 - add sp, sp, t0 - csrw mscratch, sp - la a0, userstart - j vm_boot - - .globl pop_tf -pop_tf: - LOAD t0,33*REGBYTES(a0) - csrw sepc,t0 - LOAD x1,1*REGBYTES(a0) - LOAD x2,2*REGBYTES(a0) - LOAD x3,3*REGBYTES(a0) - LOAD x4,4*REGBYTES(a0) - LOAD x5,5*REGBYTES(a0) - LOAD x6,6*REGBYTES(a0) - LOAD x7,7*REGBYTES(a0) - LOAD x8,8*REGBYTES(a0) - LOAD x9,9*REGBYTES(a0) - LOAD x11,11*REGBYTES(a0) - LOAD x12,12*REGBYTES(a0) - LOAD x13,13*REGBYTES(a0) - LOAD x14,14*REGBYTES(a0) - LOAD x15,15*REGBYTES(a0) - LOAD x16,16*REGBYTES(a0) - LOAD x17,17*REGBYTES(a0) - LOAD x18,18*REGBYTES(a0) - LOAD x19,19*REGBYTES(a0) - LOAD x20,20*REGBYTES(a0) - LOAD x21,21*REGBYTES(a0) - LOAD x22,22*REGBYTES(a0) - LOAD x23,23*REGBYTES(a0) - LOAD x24,24*REGBYTES(a0) - LOAD x25,25*REGBYTES(a0) - LOAD x26,26*REGBYTES(a0) - LOAD x27,27*REGBYTES(a0) - LOAD x28,28*REGBYTES(a0) - LOAD x29,29*REGBYTES(a0) - LOAD x30,30*REGBYTES(a0) - LOAD x31,31*REGBYTES(a0) - LOAD a0,10*REGBYTES(a0) - sret - - .global trap_entry -trap_entry: - csrrw sp, sscratch, sp - - # save gprs - STORE x1,1*REGBYTES(sp) - STORE x3,3*REGBYTES(sp) - STORE x4,4*REGBYTES(sp) - STORE x5,5*REGBYTES(sp) - STORE x6,6*REGBYTES(sp) - STORE x7,7*REGBYTES(sp) - STORE x8,8*REGBYTES(sp) - STORE x9,9*REGBYTES(sp) - STORE x10,10*REGBYTES(sp) - STORE x11,11*REGBYTES(sp) - STORE x12,12*REGBYTES(sp) - STORE x13,13*REGBYTES(sp) - STORE x14,14*REGBYTES(sp) - STORE x15,15*REGBYTES(sp) - STORE x16,16*REGBYTES(sp) - STORE x17,17*REGBYTES(sp) - STORE x18,18*REGBYTES(sp) - STORE x19,19*REGBYTES(sp) - STORE x20,20*REGBYTES(sp) - STORE x21,21*REGBYTES(sp) - STORE x22,22*REGBYTES(sp) - STORE x23,23*REGBYTES(sp) - STORE x24,24*REGBYTES(sp) - STORE x25,25*REGBYTES(sp) - STORE x26,26*REGBYTES(sp) - STORE x27,27*REGBYTES(sp) - STORE x28,28*REGBYTES(sp) - STORE x29,29*REGBYTES(sp) - STORE x30,30*REGBYTES(sp) - STORE x31,31*REGBYTES(sp) - - csrrw t0,sscratch,sp - STORE t0,2*REGBYTES(sp) - - # get sr, epc, badvaddr, cause - csrr t0,sstatus - STORE t0,32*REGBYTES(sp) - csrr t0,sepc - STORE t0,33*REGBYTES(sp) - csrr t0,sbadaddr - STORE t0,34*REGBYTES(sp) - csrr t0,scause - STORE t0,35*REGBYTES(sp) - - move a0, sp - j handle_trap diff --git a/tests/wally-riscv-arch-test/riscv-test-env/v/link.ld b/tests/wally-riscv-arch-test/riscv-test-env/v/link.ld deleted file mode 100644 index b3e315e78..000000000 --- a/tests/wally-riscv-arch-test/riscv-test-env/v/link.ld +++ /dev/null @@ -1,17 +0,0 @@ -OUTPUT_ARCH( "riscv" ) -ENTRY(_start) - -SECTIONS -{ - . = 0x80000000; - .text.init : { *(.text.init) } - . = ALIGN(0x1000); - .tohost : { *(.tohost) } - . = ALIGN(0x1000); - .text : { *(.text) } - . = ALIGN(0x1000); - .data : { *(.data) } - .bss : { *(.bss) } - _end = .; -} - diff --git a/tests/wally-riscv-arch-test/riscv-test-env/v/riscv_test.h b/tests/wally-riscv-arch-test/riscv-test-env/v/riscv_test.h deleted file mode 100644 index 8ca9ffd76..000000000 --- a/tests/wally-riscv-arch-test/riscv-test-env/v/riscv_test.h +++ /dev/null @@ -1,71 +0,0 @@ -// See LICENSE for license details. - -#ifndef _ENV_VIRTUAL_SINGLE_CORE_H -#define _ENV_VIRTUAL_SINGLE_CORE_H - -#include "../p/riscv_test.h" - -//----------------------------------------------------------------------- -// Begin Macro -//----------------------------------------------------------------------- - -#undef RVTEST_FP_ENABLE -#define RVTEST_FP_ENABLE fssr x0 - -#undef RVTEST_CODE_BEGIN -#define RVTEST_CODE_BEGIN \ - .text; \ - .global userstart; \ -userstart: \ - init - -//----------------------------------------------------------------------- -// Pass/Fail Macro -//----------------------------------------------------------------------- - -#undef RVTEST_PASS -#define RVTEST_PASS li a0, 1; scall - -#undef RVTEST_FAIL -#define RVTEST_FAIL sll a0, TESTNUM, 1; 1:beqz a0, 1b; or a0, a0, 1; scall; - -//----------------------------------------------------------------------- -// Data Section Macro -//----------------------------------------------------------------------- - -#undef RVTEST_DATA_END -#define RVTEST_DATA_END - -//----------------------------------------------------------------------- -// Supervisor mode definitions and macros -//----------------------------------------------------------------------- - -#define MAX_TEST_PAGES 63 // this must be the period of the LFSR below -#define LFSR_NEXT(x) (((((x)^((x)>>1)) & 1) << 5) | ((x) >> 1)) - -#define PGSHIFT 12 -#define PGSIZE (1UL << PGSHIFT) - -#define SIZEOF_TRAPFRAME_T ((__riscv_xlen / 8) * 36) - -#ifndef __ASSEMBLER__ - -typedef unsigned long pte_t; -#define LEVELS (sizeof(pte_t) == sizeof(uint64_t) ? 3 : 2) -#define PTIDXBITS (PGSHIFT - (sizeof(pte_t) == 8 ? 3 : 2)) -#define VPN_BITS (PTIDXBITS * LEVELS) -#define VA_BITS (VPN_BITS + PGSHIFT) -#define PTES_PER_PT (1UL << RISCV_PGLEVEL_BITS) -#define MEGAPAGE_SIZE (PTES_PER_PT * PGSIZE) - -typedef struct -{ - long gpr[32]; - long sr; - long epc; - long badvaddr; - long cause; -} trapframe_t; -#endif - -#endif diff --git a/tests/wally-riscv-arch-test/riscv-test-env/v/string.c b/tests/wally-riscv-arch-test/riscv-test-env/v/string.c deleted file mode 100644 index 4ffedc0a4..000000000 --- a/tests/wally-riscv-arch-test/riscv-test-env/v/string.c +++ /dev/null @@ -1,114 +0,0 @@ -#include -#include -#include - -void* memcpy(void* dest, const void* src, size_t len) -{ - if ((((uintptr_t)dest | (uintptr_t)src | len) & (sizeof(uintptr_t)-1)) == 0) { - const uintptr_t* s = src; - uintptr_t *d = dest; - while (d < (uintptr_t*)(dest + len)) - *d++ = *s++; - } else { - const char* s = src; - char *d = dest; - while (d < (char*)(dest + len)) - *d++ = *s++; - } - return dest; -} - -void* memset(void* dest, int byte, size_t len) -{ - if ((((uintptr_t)dest | len) & (sizeof(uintptr_t)-1)) == 0) { - uintptr_t word = byte & 0xFF; - word |= word << 8; - word |= word << 16; - word |= word << 16 << 16; - - uintptr_t *d = dest; - while (d < (uintptr_t*)(dest + len)) - *d++ = word; - } else { - char *d = dest; - while (d < (char*)(dest + len)) - *d++ = byte; - } - return dest; -} - -size_t strlen(const char *s) -{ - const char *p = s; - while (*p) - p++; - return p - s; -} - -int strcmp(const char* s1, const char* s2) -{ - unsigned char c1, c2; - - do { - c1 = *s1++; - c2 = *s2++; - } while (c1 != 0 && c1 == c2); - - return c1 - c2; -} - -int memcmp(const void* s1, const void* s2, size_t n) -{ - if ((((uintptr_t)s1 | (uintptr_t)s2) & (sizeof(uintptr_t)-1)) == 0) { - const uintptr_t* u1 = s1; - const uintptr_t* u2 = s2; - const uintptr_t* end = u1 + (n / sizeof(uintptr_t)); - while (u1 < end) { - if (*u1 != *u2) - break; - u1++; - u2++; - } - n -= (const void*)u1 - s1; - s1 = u1; - s2 = u2; - } - - while (n--) { - unsigned char c1 = *(const unsigned char*)s1++; - unsigned char c2 = *(const unsigned char*)s2++; - if (c1 != c2) - return c1 - c2; - } - - return 0; -} - -char* strcpy(char* dest, const char* src) -{ - char* d = dest; - while ((*d++ = *src++)) - ; - return dest; -} - -long atol(const char* str) -{ - long res = 0; - int sign = 0; - - while (*str == ' ') - str++; - - if (*str == '-' || *str == '+') { - sign = *str == '-'; - str++; - } - - while (*str) { - res *= 10; - res += *str++ - '0'; - } - - return sign ? -res : res; -} diff --git a/tests/wally-riscv-arch-test/riscv-test-env/v/vm.c b/tests/wally-riscv-arch-test/riscv-test-env/v/vm.c deleted file mode 100644 index 8064b7baf..000000000 --- a/tests/wally-riscv-arch-test/riscv-test-env/v/vm.c +++ /dev/null @@ -1,273 +0,0 @@ -// See LICENSE for license details. - -#include -#include -#include - -#include "riscv_test.h" - -void trap_entry(); -void pop_tf(trapframe_t*); - -volatile uint64_t tohost; -volatile uint64_t fromhost; - -static void do_tohost(uint64_t tohost_value) -{ - while (tohost) - fromhost = 0; - tohost = tohost_value; -} - -#define pa2kva(pa) ((void*)(pa) - DRAM_BASE - MEGAPAGE_SIZE) -#define uva2kva(pa) ((void*)(pa) - MEGAPAGE_SIZE) - -#define flush_page(addr) asm volatile ("sfence.vma %0" : : "r" (addr) : "memory") - -static uint64_t lfsr63(uint64_t x) -{ - uint64_t bit = (x ^ (x >> 1)) & 1; - return (x >> 1) | (bit << 62); -} - -static void cputchar(int x) -{ - do_tohost(0x0101000000000000 | (unsigned char)x); -} - -static void cputstring(const char* s) -{ - while (*s) - cputchar(*s++); -} - -static void terminate(int code) -{ - do_tohost(code); - while (1); -} - -void wtf() -{ - terminate(841); -} - -#define stringify1(x) #x -#define stringify(x) stringify1(x) -#define assert(x) do { \ - if (x) break; \ - cputstring("Assertion failed: " stringify(x) "\n"); \ - terminate(3); \ -} while(0) - -#define l1pt pt[0] -#define user_l2pt pt[1] -#if __riscv_xlen == 64 -# define NPT 4 -#define kernel_l2pt pt[2] -# define user_l3pt pt[3] -#else -# define NPT 2 -# define user_l3pt user_l2pt -#endif -pte_t pt[NPT][PTES_PER_PT] __attribute__((aligned(PGSIZE))); - -typedef struct { pte_t addr; void* next; } freelist_t; - -freelist_t user_mapping[MAX_TEST_PAGES]; -freelist_t freelist_nodes[MAX_TEST_PAGES]; -freelist_t *freelist_head, *freelist_tail; - -void printhex(uint64_t x) -{ - char str[17]; - for (int i = 0; i < 16; i++) - { - str[15-i] = (x & 0xF) + ((x & 0xF) < 10 ? '0' : 'a'-10); - x >>= 4; - } - str[16] = 0; - - cputstring(str); -} - -static void evict(unsigned long addr) -{ - assert(addr >= PGSIZE && addr < MAX_TEST_PAGES * PGSIZE); - addr = addr/PGSIZE*PGSIZE; - - freelist_t* node = &user_mapping[addr/PGSIZE]; - if (node->addr) - { - // check accessed and dirty bits - assert(user_l3pt[addr/PGSIZE] & PTE_A); - uintptr_t sstatus = set_csr(sstatus, SSTATUS_SUM); - if (memcmp((void*)addr, uva2kva(addr), PGSIZE)) { - assert(user_l3pt[addr/PGSIZE] & PTE_D); - memcpy((void*)addr, uva2kva(addr), PGSIZE); - } - write_csr(sstatus, sstatus); - - user_mapping[addr/PGSIZE].addr = 0; - - if (freelist_tail == 0) - freelist_head = freelist_tail = node; - else - { - freelist_tail->next = node; - freelist_tail = node; - } - } -} - -void handle_fault(uintptr_t addr, uintptr_t cause) -{ - assert(addr >= PGSIZE && addr < MAX_TEST_PAGES * PGSIZE); - addr = addr/PGSIZE*PGSIZE; - - if (user_l3pt[addr/PGSIZE]) { - if (!(user_l3pt[addr/PGSIZE] & PTE_A)) { - user_l3pt[addr/PGSIZE] |= PTE_A; - } else { - assert(!(user_l3pt[addr/PGSIZE] & PTE_D) && cause == CAUSE_STORE_PAGE_FAULT); - user_l3pt[addr/PGSIZE] |= PTE_D; - } - flush_page(addr); - return; - } - - freelist_t* node = freelist_head; - assert(node); - freelist_head = node->next; - if (freelist_head == freelist_tail) - freelist_tail = 0; - - uintptr_t new_pte = (node->addr >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V | PTE_U | PTE_R | PTE_W | PTE_X; - user_l3pt[addr/PGSIZE] = new_pte | PTE_A | PTE_D; - flush_page(addr); - - assert(user_mapping[addr/PGSIZE].addr == 0); - user_mapping[addr/PGSIZE] = *node; - - uintptr_t sstatus = set_csr(sstatus, SSTATUS_SUM); - memcpy((void*)addr, uva2kva(addr), PGSIZE); - write_csr(sstatus, sstatus); - - user_l3pt[addr/PGSIZE] = new_pte; - flush_page(addr); - - __builtin___clear_cache(0,0); -} - -void handle_trap(trapframe_t* tf) -{ - if (tf->cause == CAUSE_USER_ECALL) - { - int n = tf->gpr[10]; - - for (long i = 1; i < MAX_TEST_PAGES; i++) - evict(i*PGSIZE); - - terminate(n); - } - else if (tf->cause == CAUSE_ILLEGAL_INSTRUCTION) - { - assert(tf->epc % 4 == 0); - - int* fssr; - asm ("jal %0, 1f; fssr x0; 1:" : "=r"(fssr)); - - if (*(int*)tf->epc == *fssr) - terminate(1); // FP test on non-FP hardware. "succeed." - else - assert(!"illegal instruction"); - tf->epc += 4; - } - else if (tf->cause == CAUSE_FETCH_PAGE_FAULT || tf->cause == CAUSE_LOAD_PAGE_FAULT || tf->cause == CAUSE_STORE_PAGE_FAULT) - handle_fault(tf->badvaddr, tf->cause); - else - assert(!"unexpected exception"); - - pop_tf(tf); -} - -static void coherence_torture() -{ - // cause coherence misses without affecting program semantics - unsigned int random = ENTROPY; - while (1) { - uintptr_t paddr = DRAM_BASE + ((random % (2 * (MAX_TEST_PAGES + 1) * PGSIZE)) & -4); -#ifdef __riscv_atomic - if (random & 1) // perform a no-op write - asm volatile ("amoadd.w zero, zero, (%0)" :: "r"(paddr)); - else // perform a read -#endif - asm volatile ("lw zero, (%0)" :: "r"(paddr)); - random = lfsr63(random); - } -} - -void vm_boot(uintptr_t test_addr) -{ - unsigned int random = ENTROPY; - if (read_csr(mhartid) > 0) - coherence_torture(); - - _Static_assert(SIZEOF_TRAPFRAME_T == sizeof(trapframe_t), "???"); - -#if (MAX_TEST_PAGES > PTES_PER_PT) || (DRAM_BASE % MEGAPAGE_SIZE) != 0 -# error -#endif - // map user to lowermost megapage - l1pt[0] = ((pte_t)user_l2pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V; - // map kernel to uppermost megapage -#if __riscv_xlen == 64 - l1pt[PTES_PER_PT-1] = ((pte_t)kernel_l2pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V; - kernel_l2pt[PTES_PER_PT-1] = (DRAM_BASE/RISCV_PGSIZE << PTE_PPN_SHIFT) | PTE_V | PTE_R | PTE_W | PTE_X | PTE_A | PTE_D; - user_l2pt[0] = ((pte_t)user_l3pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V; - uintptr_t vm_choice = SATP_MODE_SV39; -#else - l1pt[PTES_PER_PT-1] = (DRAM_BASE/RISCV_PGSIZE << PTE_PPN_SHIFT) | PTE_V | PTE_R | PTE_W | PTE_X | PTE_A | PTE_D; - uintptr_t vm_choice = SATP_MODE_SV32; -#endif - write_csr(satp, ((uintptr_t)l1pt >> PGSHIFT) | - (vm_choice * (SATP_MODE & ~(SATP_MODE<<1)))); - - // Set up PMPs if present, ignoring illegal instruction trap if not. - uintptr_t pmpc = PMP_NAPOT | PMP_R | PMP_W | PMP_X; - asm volatile ("la t0, 1f\n\t" - "csrrw t0, mtvec, t0\n\t" - "csrw pmpaddr0, %1\n\t" - "csrw pmpcfg0, %0\n\t" - ".align 2\n\t" - "1:" - : : "r" (pmpc), "r" (-1UL) : "t0"); - - // set up supervisor trap handling - write_csr(stvec, pa2kva(trap_entry)); - write_csr(sscratch, pa2kva(read_csr(mscratch))); - write_csr(medeleg, - (1 << CAUSE_USER_ECALL) | - (1 << CAUSE_FETCH_PAGE_FAULT) | - (1 << CAUSE_LOAD_PAGE_FAULT) | - (1 << CAUSE_STORE_PAGE_FAULT)); - // FPU on; accelerator on; allow supervisor access to user memory access - write_csr(mstatus, MSTATUS_FS | MSTATUS_XS); - write_csr(mie, 0); - - random = 1 + (random % MAX_TEST_PAGES); - freelist_head = pa2kva((void*)&freelist_nodes[0]); - freelist_tail = pa2kva(&freelist_nodes[MAX_TEST_PAGES-1]); - for (long i = 0; i < MAX_TEST_PAGES; i++) - { - freelist_nodes[i].addr = DRAM_BASE + (MAX_TEST_PAGES + random)*PGSIZE; - freelist_nodes[i].next = pa2kva(&freelist_nodes[i+1]); - random = LFSR_NEXT(random); - } - freelist_nodes[MAX_TEST_PAGES-1].next = 0; - - trapframe_t tf; - memset(&tf, 0, sizeof(tf)); - tf.epc = test_addr - DRAM_BASE; - pop_tf(&tf); -} From 929a9f0f1d01b9e1f63e1e070cb66b6066575251 Mon Sep 17 00:00:00 2001 From: bbracker Date: Tue, 8 Feb 2022 00:26:06 +0000 Subject: [PATCH 2/2] refactor buildroot-config-src into linux folder --- .../linux-testgen => linux}/buildroot-config-src/busybox.config | 0 {tests/linux-testgen => linux}/buildroot-config-src/linux.config | 0 {tests/linux-testgen => linux}/buildroot-config-src/main.config | 0 .../buildroot-config-src/make-buildroot.sh | 0 4 files changed, 0 insertions(+), 0 deletions(-) rename {tests/linux-testgen => linux}/buildroot-config-src/busybox.config (100%) rename {tests/linux-testgen => linux}/buildroot-config-src/linux.config (100%) rename {tests/linux-testgen => linux}/buildroot-config-src/main.config (100%) rename {tests/linux-testgen => linux}/buildroot-config-src/make-buildroot.sh (100%) diff --git a/tests/linux-testgen/buildroot-config-src/busybox.config b/linux/buildroot-config-src/busybox.config similarity index 100% rename from tests/linux-testgen/buildroot-config-src/busybox.config rename to linux/buildroot-config-src/busybox.config diff --git a/tests/linux-testgen/buildroot-config-src/linux.config b/linux/buildroot-config-src/linux.config similarity index 100% rename from tests/linux-testgen/buildroot-config-src/linux.config rename to linux/buildroot-config-src/linux.config diff --git a/tests/linux-testgen/buildroot-config-src/main.config b/linux/buildroot-config-src/main.config similarity index 100% rename from tests/linux-testgen/buildroot-config-src/main.config rename to linux/buildroot-config-src/main.config diff --git a/tests/linux-testgen/buildroot-config-src/make-buildroot.sh b/linux/buildroot-config-src/make-buildroot.sh similarity index 100% rename from tests/linux-testgen/buildroot-config-src/make-buildroot.sh rename to linux/buildroot-config-src/make-buildroot.sh