From f30c92e82a4c6294496b87a5f81ee1cf6c2182f2 Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Tue, 11 Jul 2023 15:09:04 -0500 Subject: [PATCH] Added wfi and interrupt to tracer. --- testbench/common/wallyTracer.sv | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/testbench/common/wallyTracer.sv b/testbench/common/wallyTracer.sv index a1dc318ec..6e186b950 100644 --- a/testbench/common/wallyTracer.sv +++ b/testbench/common/wallyTracer.sv @@ -61,7 +61,9 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi); logic [`NUM_CSRS-1:0] CSR_W; logic CSRWriteM, CSRWriteW; logic [11:0] CSRAdrM, CSRAdrW; - + logic wfiM; + logic InterruptM; + assign clk = testbench.dut.clk; // assign InstrValidF = testbench.dut.core.ieu.InstrValidF; // not needed yet assign InstrValidD = testbench.dut.core.ieu.c.InstrValidD; @@ -88,6 +90,9 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi); assign PrivilegeModeW = testbench.dut.core.priv.priv.privmode.PrivilegeModeW; assign STATUS_SXL = testbench.dut.core.priv.priv.csr.csrsr.STATUS_SXL; assign STATUS_UXL = testbench.dut.core.priv.priv.csr.csrsr.STATUS_UXL; + assign wfiM = testbench.dut.core.priv.priv.wfiM; + assign InterruptM = testbench.dut.core.priv.priv.InterruptM; + logic valid; int csrid;