From c5015e5809f6a1d6cf451107f52551a86e4ef623 Mon Sep 17 00:00:00 2001
From: bbracker <bbracker@hmc.edu>
Date: Sat, 13 Mar 2021 00:10:41 -0500
Subject: [PATCH 1/2] imem rd2 adrbits bugfix
---
wally-pipelined/src/uncore/imem.sv | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/wally-pipelined/src/uncore/imem.sv b/wally-pipelined/src/uncore/imem.sv
index 4ce2e4666..64f3a0d64 100644
--- a/wally-pipelined/src/uncore/imem.sv
+++ b/wally-pipelined/src/uncore/imem.sv
@@ -37,12 +37,12 @@ module imem (
logic [`XLEN-1:0] bootram[`BOOTTIMBASE>>(1+`XLEN/32):(`BOOTTIMRANGE+`BOOTTIMBASE)>>(1+`XLEN/32)];
`endif
/* verilator lint_on UNDRIVEN */
- logic [28:0] adrbits;
+ logic [31:0] adrbits; // needs to be 32 bits to index RAM
logic [`XLEN-1:0] rd;
// logic [15:0] rd2;
generate
- if (`XLEN==32) assign adrbits = AdrF[30:2];
+ if (`XLEN==32) assign adrbits = AdrF[31:2];
else assign adrbits = AdrF[31:3];
endgenerate
From 345254b5a3cfd93ff3b28db6f9ad121e457defa1 Mon Sep 17 00:00:00 2001
From: bbracker <bbracker@hmc.edu>
Date: Sat, 13 Mar 2021 06:55:34 -0500
Subject: [PATCH 2/2] slightly smarter dtim HREADY
---
wally-pipelined/src/uncore/dtim.sv | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/wally-pipelined/src/uncore/dtim.sv b/wally-pipelined/src/uncore/dtim.sv
index 5d3f47e3a..d9e0d81cb 100644
--- a/wally-pipelined/src/uncore/dtim.sv
+++ b/wally-pipelined/src/uncore/dtim.sv
@@ -40,6 +40,8 @@ module dtim #(parameter BASE=0, RANGE = 65535) (
logic [`XLEN-1:0] HREADTim0;
// logic [`XLEN-1:0] write;
+ logic [31:0] HADDRd;
+ logic newAdr;
logic [15:0] entry;
logic memread, memwrite;
logic [3:0] busycount;
@@ -48,14 +50,17 @@ module dtim #(parameter BASE=0, RANGE = 65535) (
memread <= HSELTim & ~ HWRITE;
memwrite <= HSELTim & HWRITE;
A <= HADDR;
+ HADDRd <= HADDR;
end
+ assign newAdr = HADDR!=HADDRd;
+
// busy FSM to extend READY signal
always_ff @(posedge HCLK, negedge HRESETn)
if (~HRESETn) begin
HREADYTim <= 1;
end else begin
- if (HREADYTim & HSELTim) begin
+ if ((HREADYTim | newAdr) & HSELTim) begin
busycount <= 0;
HREADYTim <= #1 0;
end else if (~HREADYTim) begin