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This actually fixes the vcu108 to correctly set the SPI clock frequency.

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This commit is contained in:
Rose Thompson 2024-09-03 13:11:03 -07:00
parent c24d061d0a
commit f22f056b09
2 changed files with 3 additions and 3 deletions
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4
fpga/generator/Makefile
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@ -15,14 +15,14 @@ vcu118: export XILINX_PART := xcvu9p-flga2104-2L-e
vcu118: export XILINX_BOARD := xilinx.com:vcu118:part0:2.4 vcu118: export XILINX_BOARD := xilinx.com:vcu118:part0:2.4
vcu118: export board := vcu118 vcu118: export board := vcu118
vcu118: export SYSTEMCLOCK := 71000000 vcu118: export SYSTEMCLOCK := 71000000
ArtyA7: export MAXSDCCLOCK := 1000000 vcu118: export MAXSDCCLOCK := 1000000
vcu118: FPGA_VCU vcu118: FPGA_VCU
vcu108: export XILINX_PART := xcvu095-ffva2104-2-e vcu108: export XILINX_PART := xcvu095-ffva2104-2-e
vcu108: export XILINX_BOARD := xilinx.com:vcu108:part0:1.7 vcu108: export XILINX_BOARD := xilinx.com:vcu108:part0:1.7
vcu108: export board := vcu108 vcu108: export board := vcu108
vcu108: export SYSTEMCLOCK := 50000000 vcu108: export SYSTEMCLOCK := 50000000
ArtyA7: export MAXSDCCLOCK := 12500000 vcu108: export MAXSDCCLOCK := 12500000
vcu108: FPGA_VCU vcu108: FPGA_VCU
# variables computed from config # variables computed from config

2
fpga/generator/ddr4-vcu108.tcl
View File

@ -7,7 +7,7 @@ set SYSTEMCLOCK $::env(SYSTEMCLOCK)
set ipName ddr4 set ipName ddr4
set SYSTEMCLOCK_MHz [expr $SYSTEMCLOCK/1000000.0] set SYSTEMCLOCK_MHz [expr $SYSTEMCLOCK/1000000]
create_project $ipName . -force -part $partNumber create_project $ipName . -force -part $partNumber
set_property board_part $boardName [current_project] set_property board_part $boardName [current_project]