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https://github.com/openhwgroup/cvw
synced 2025-02-02 17:55:19 +00:00
This actually fixes the vcu108 to correctly set the SPI clock frequency.
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@ -15,14 +15,14 @@ vcu118: export XILINX_PART := xcvu9p-flga2104-2L-e
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vcu118: export XILINX_BOARD := xilinx.com:vcu118:part0:2.4
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vcu118: export XILINX_BOARD := xilinx.com:vcu118:part0:2.4
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vcu118: export board := vcu118
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vcu118: export board := vcu118
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vcu118: export SYSTEMCLOCK := 71000000
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vcu118: export SYSTEMCLOCK := 71000000
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ArtyA7: export MAXSDCCLOCK := 1000000
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vcu118: export MAXSDCCLOCK := 1000000
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vcu118: FPGA_VCU
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vcu118: FPGA_VCU
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vcu108: export XILINX_PART := xcvu095-ffva2104-2-e
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vcu108: export XILINX_PART := xcvu095-ffva2104-2-e
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vcu108: export XILINX_BOARD := xilinx.com:vcu108:part0:1.7
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vcu108: export XILINX_BOARD := xilinx.com:vcu108:part0:1.7
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vcu108: export board := vcu108
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vcu108: export board := vcu108
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vcu108: export SYSTEMCLOCK := 50000000
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vcu108: export SYSTEMCLOCK := 50000000
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ArtyA7: export MAXSDCCLOCK := 12500000
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vcu108: export MAXSDCCLOCK := 12500000
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vcu108: FPGA_VCU
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vcu108: FPGA_VCU
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# variables computed from config
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# variables computed from config
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@ -7,7 +7,7 @@ set SYSTEMCLOCK $::env(SYSTEMCLOCK)
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set ipName ddr4
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set ipName ddr4
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set SYSTEMCLOCK_MHz [expr $SYSTEMCLOCK/1000000.0]
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set SYSTEMCLOCK_MHz [expr $SYSTEMCLOCK/1000000]
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create_project $ipName . -force -part $partNumber
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create_project $ipName . -force -part $partNumber
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set_property board_part $boardName [current_project]
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set_property board_part $boardName [current_project]
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