From 7e494f2d3b4e5220bd5b9a2c540171568c1e9365 Mon Sep 17 00:00:00 2001 From: Jacob Pease Date: Fri, 1 Dec 2023 18:59:18 -0600 Subject: [PATCH] Removed vivado property from rom1p1r.sv. It's now dynamically added using the FPGA makefile. --- fpga/generator/Makefile | 2 ++ src/generic/mem/rom1p1r.sv | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/fpga/generator/Makefile b/fpga/generator/Makefile index 7f70955be..4f60d1ebe 100644 --- a/fpga/generator/Makefile +++ b/fpga/generator/Makefile @@ -71,6 +71,8 @@ PreProcessFiles: sed -i "s/PLIC_SDC_ID.*/PLIC_SDC_ID = 32'd20;/g" ../src/CopiedFiles_do_not_add_to_repo/config/config.vh sed -i "s/BPRED_SIZE.*/BPRED_SIZE = 32'd12;/g" ../src/CopiedFiles_do_not_add_to_repo/config/config.vh sed -i "s/$\$readmemh.*/$\$readmemh(\"..\/..\/..\/fpga\/src\/boot.mem\", ROM, 0);/g" ../src/CopiedFiles_do_not_add_to_repo/generic/mem/rom1p1r.sv + # This line allows the Bootloader to be loaded in a Block RAM on the FPGA + sed -i "s/logic \[DATA_WIDTH-1:0\].*ROM.*/(\* rom_style=\"block\" \*) &/g" ../src/CopiedFiles_do_not_add_to_repo/generic/mem/rom1p1r.sv $(dst)/%.log: %.tcl mkdir -p IP diff --git a/src/generic/mem/rom1p1r.sv b/src/generic/mem/rom1p1r.sv index 617a779ff..c298dba63 100644 --- a/src/generic/mem/rom1p1r.sv +++ b/src/generic/mem/rom1p1r.sv @@ -33,7 +33,7 @@ module rom1p1r #(parameter ADDR_WIDTH = 8, DATA_WIDTH = 32, PRELOAD_ENABLED = 0) ); // Core Memory - (*rom_style="block" *) logic [DATA_WIDTH-1:0] ROM [(2**ADDR_WIDTH)-1:0]; + logic [DATA_WIDTH-1:0] ROM [(2**ADDR_WIDTH)-1:0]; // dh 10/30/23 ROM macros are presently commented out // because they don't point to a generated ROM