From efa99940c5a397f41cb571b03718008eac962610 Mon Sep 17 00:00:00 2001
From: Rose Thompson <ross1728@gmail.com>
Date: Mon, 22 Jul 2024 12:19:37 -0500
Subject: [PATCH] Added option to use rvvi ila

---
 fpga/generator/wally.tcl | 1 +
 1 file changed, 1 insertion(+)

diff --git a/fpga/generator/wally.tcl b/fpga/generator/wally.tcl
index eff0a6cb9..9df775646 100644
--- a/fpga/generator/wally.tcl
+++ b/fpga/generator/wally.tcl
@@ -90,6 +90,7 @@ write_verilog -force -mode funcsim sim/syn-funcsim.v
 
 if {$board=="ArtyA7"} {
     source ../constraints/small-debug.xdc
+    #source ../constraints/small-debug-rvvi.xdc
 
 } else {
     # source ../constraints/vcu-small-debug.xdc