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https://github.com/openhwgroup/cvw
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Merge pull request #612 from harshinisrinath1001/main
Wrote exclusions for ifu and lsu peripherals which were always supported
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commit
ef96458570
@ -136,7 +136,13 @@ coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/iromdec
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/ddr4dec
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/sdcdec
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# PMA Regions 8, 9, and 10 (dtim, irom, ddr4) are never used in the rv64gc configuration, so exclude coverage
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# PMA Regions 1, 2, and 3 (dtim, irom, ddr4) are never used in the rv64gc configuration, so exclude coverage
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set line [GetLineNum ../src/mmu/pmachecker.sv "exclusion-tag: unused-atomic"]
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coverage exclude -scope /dut/core/lsu/dmmu/dmmu/pmachecker -linerange $line-$line -item e 1 -fecexprrow 2,4
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker -linerange $line-$line -item e 1 -fecexprrow 2,4
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set line [GetLineNum ../src/mmu/pmachecker.sv "exclusion-tag: unused-tim"]
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coverage exclude -scope /dut/core/lsu/dmmu/dmmu/pmachecker -linerange $line-$line -item e 1 -fecexprrow 2,4
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker -linerange $line-$line -item e 1 -fecexprrow 2,4
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set line [GetLineNum ../src/mmu/pmachecker.sv "exclusion-tag: unused-cachable"]
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coverage exclude -scope /dut/core/lsu/dmmu/dmmu/pmachecker -linerange $line-$line -item e 1 -fecexprrow 2
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker -linerange $line-$line -item e 1 -fecexprrow 2
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@ -145,11 +151,17 @@ coverage exclude -scope /dut/core/lsu/dmmu/dmmu/pmachecker -linerange $line-$lin
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker -linerange $line-$line -item e 1 -fecexprrow 2,4,6,8
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# Excluding so far un-used instruction sources for the ifu
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# coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/bootromdec
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# coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/uncoreramdec
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/bootromdec
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/uncoreramdec
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/spidec
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#Excluding the bootrom, uncoreran, and clint as sources for the lsu
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# coverage exclude -scope /dut/core/lsu/dmmu/dmmu/pmachecker/adrdecs/bootromdec
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# The following peripherals are always supported
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set line [GetLineNum ../src/mmu/adrdec.sv "exclusion-tag: adrdecSel"]
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coverage exclude -scope /dut/core/lsu/dmmu/dmmu/pmachecker/adrdecs/bootromdec -linerange $line-$line -item e 1 -fecexprrow 3,7
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coverage exclude -scope /dut/core/lsu/dmmu/dmmu/pmachecker/adrdecs/gpiodec -linerange $line-$line -item e 1 -fecexprrow 3
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coverage exclude -scope /dut/core/lsu/dmmu/dmmu/pmachecker/adrdecs/uartdec -linerange $line-$line -item e 1 -fecexprrow 3
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coverage exclude -scope /dut/core/lsu/dmmu/dmmu/pmachecker/adrdecs/plicdec -linerange $line-$line -item e 1 -fecexprrow 3
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coverage exclude -scope /dut/core/lsu/dmmu/dmmu/pmachecker/adrdecs/spidec -linerange $line-$line -item e 1 -fecexprrow 3
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#Excluding signals in lsu: clintdec and uncoreram accept all sizes so 'SizeValid' will never be 0
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set line [GetLineNum ../src/mmu/adrdec.sv "& SizeValid"]
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@ -140,15 +140,12 @@ module unpackinput import cvw::*; #(parameter cvw_t P) (
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endcase
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always_comb
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if (BadNaNBox) begin
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case (Fmt)
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P.FMT: PostBox = In;
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P.FMT1: PostBox = {{(P.FLEN-P.LEN1){1'b1}}, 1'b1, {(P.NE1+1){1'b1}}, {(P.LEN1-P.NE1-2){1'b0}}};
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P.FMT2: PostBox = {{(P.FLEN-P.LEN2){1'b1}}, 1'b1, {(P.NE2+1){1'b1}}, {(P.LEN2-P.NE2-2){1'b0}}};
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default: PostBox = 'x;
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endcase
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end else
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PostBox = In;
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if (BadNaNBox & Fmt == P.FMT1)
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PostBox = {{(P.FLEN-P.LEN1){1'b1}}, 1'b1, {(P.NE1+1){1'b1}}, {(P.LEN1-P.NE1-2){1'b0}}};
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else if (BadNaNBox & Fmt == P.FMT2)
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PostBox = {{(P.FLEN-P.LEN2){1'b1}}, 1'b1, {(P.NE2+1){1'b1}}, {(P.LEN2-P.NE2-2){1'b0}}};
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else
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PostBox = In;
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// extract the sign bit
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always_comb
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@ -49,5 +49,5 @@ module adrdec #(parameter PA_BITS) (
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assign SizeValid = SizeMask[Size];
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// Select this peripheral if the address matches, the peripheral is supported, and the type and size of access is ok
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assign Sel = Match & Supported & AccessValid & SizeValid;
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assign Sel = Match & Supported & AccessValid & SizeValid; // exclusion-tag: adrdecSel
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endmodule
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