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https://github.com/openhwgroup/cvw
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Optimized out aes64im hardware; sharing with aes64d
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@ -28,12 +28,12 @@
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module aes64d(
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input logic [63:0] rs1,
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input logic [63:0] rs2,
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input logic finalround,
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input logic finalround, aes64im,
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output logic [63:0] result
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);
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logic [127:0] ShiftRowOut;
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logic [63:0] SboxOut, MixcolOut;
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logic [63:0] SboxOut, MixcolIn, MixcolOut;
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// Apply inverse shiftrows to rs2 and rs1
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aesinvshiftrow srow({rs2, rs1}, ShiftRowOut);
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@ -42,9 +42,11 @@ module aes64d(
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aesinvsboxword invsbox0(ShiftRowOut[31:0], SboxOut[31:0]);
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aesinvsboxword invsbox1(ShiftRowOut[63:32], SboxOut[63:32]);
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mux2 #(64) mixcolmux(SboxOut, rs1, aes64im, MixcolIn);
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// Apply inverse mixword to sbox outputs
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aesinvmixcolumns invmw0(SboxOut[31:0], MixcolOut[31:0]);
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aesinvmixcolumns invmw1(SboxOut[63:32], MixcolOut[63:32]);
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aesinvmixcolumns invmw0(MixcolIn[31:0], MixcolOut[31:0]);
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aesinvmixcolumns invmw1(MixcolIn[63:32], MixcolOut[63:32]);
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// Final round skips mixcolumns.
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mux2 #(64) resultmux(MixcolOut, SboxOut, finalround, result);
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@ -28,7 +28,7 @@
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module aes64e(
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input logic [63:0] rs1,
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input logic [63:0] rs2,
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input logic finalround,
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input logic finalround,
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output logic [63:0] result
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);
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@ -41,9 +41,9 @@ module aes64e(
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// Apply substitution box to 2 lower words
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aessboxword sbox0(ShiftRowOut[31:0], SboxOut[31:0]);
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aessboxword sbox1(ShiftRowOut[63:32], SboxOut[63:32]);
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// Apply mix columns operations
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aesmixcolumns mw0(SboxOut[31:0], MixcolOut[31:0]);
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aesmixcolumns mw0(SboxOut[31:0], MixcolOut[31:0]);
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aesmixcolumns mw1(SboxOut[63:32], MixcolOut[63:32]);
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// Skip mixcolumns on last round
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@ -27,9 +27,9 @@
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module aes64im(
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input logic [63:0] rs1,
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output logic [63:0] DataOut
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output logic [63:0] result
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);
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aesinvmixcolumns inv_mw_0(rs1[31:0], DataOut[31:0]);
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aesinvmixcolumns inv_mw_1(rs1[63:32], DataOut[63:32]);
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aesinvmixcolumns inv_mw_0(rs1[31:0], result[31:0]);
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aesinvmixcolumns inv_mw_1(rs1[63:32], result[63:32]);
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endmodule
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@ -26,7 +26,7 @@
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////////////////////////////////////////////////////////////////////////////////////////////////
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module aes64ks1i(
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input logic [3:0] roundnum,
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input logic [3:0] round,
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input logic [63:0] rs1,
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output logic [63:0] result
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);
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@ -35,11 +35,10 @@ module aes64ks1i(
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logic [7:0] rcon8;
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logic [31:0] rcon, rs1Rotate, tmp2, SboxOut;
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rconlut128 rc(roundnum, rcon8); // Get rcon value from lookup table
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rconlut128 rc(round, rcon8); // Get rcon value from lookup table
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assign rcon = {24'b0, rcon8}; // Zero-pad RCON
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assign rs1Rotate = {rs1[39:32], rs1[63:40]}; // Get rotated value fo ruse in tmp2
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assign finalround = (roundnum == 4'b1010); // round 10 is the last one
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assign finalround = (round == 4'b1010); // round 10 is the last one
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assign tmp2 = finalround ? rs1[63:32] : rs1Rotate; // Don't rotate on the last round
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aessboxword sbox(tmp2, SboxOut); // Substitute bytes of value obtained for tmp2 using Rijndael sbox
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assign result[31:0] = SboxOut ^ rcon;
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@ -115,13 +115,13 @@ module bitmanipalu import cvw::*; #(parameter cvw_t P) (
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// ZKND Unit
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if (P.ZKND_SUPPORTED) begin: zknd
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if (P.XLEN == 32) aes32d aes32d(.bs(Funct7[6:5]), .rs1(ABMU), .rs2(BBMU), .finalround(ZBBSelect[2]), .result(ZKNDResult));
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else zknd64 #(P.XLEN) ZKND64(.A(ABMU), .B(BBMU), .Funct7, .RNUM(Rs2E[3:0]), .ZKNDSelect(ZBBSelect[2:0]), .ZKNDResult);
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else zknd64 #(P.XLEN) ZKND64(.A(ABMU), .B(BBMU), .Funct7, .round(Rs2E[3:0]), .ZKNDSelect(ZBBSelect[3:0]), .ZKNDResult);
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end else assign ZKNDResult = 0;
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// ZKNE Unit
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if (P.ZKNE_SUPPORTED) begin: zkne
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if (P.XLEN == 32) aes32e aes32e(.bs(Funct7[6:5]), .rs1(ABMU), .rs2(BBMU), .finalround(ZBBSelect[2]), .result(ZKNEResult));
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else zkne64 #(P.XLEN) ZKNE64(.A(ABMU), .B(BBMU), .Funct7, .RNUM(Rs2E[3:0]), .ZKNESelect(ZBBSelect[2:0]), .ZKNEResult);
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else zkne64 #(P.XLEN) ZKNE64(.A(ABMU), .B(BBMU), .Funct7, .round(Rs2E[3:0]), .ZKNESelect(ZBBSelect[2:0]), .ZKNEResult);
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end else assign ZKNEResult = 0;
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// ZKNH Unit
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@ -223,7 +223,7 @@ module bmuctrl import cvw::*; #(parameter cvw_t P) (
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17'b0110011_0011101_000: BMUControlsD = `BMUCTRLW'b000_0111_0100_1_0_0_1_0_0_0_0_0; // aes64ds - decrypt final round
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17'b0110011_0011111_000: BMUControlsD = `BMUCTRLW'b000_0111_0000_1_0_0_1_0_0_0_0_0; // aes64dsm - decrypt mid round
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17'b0010011_0011000_001: if (Rs2D == 5'b00000)
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BMUControlsD = `BMUCTRLW'b000_0111_0011_1_1_0_1_0_0_0_0_0; // aes64im - decrypt keyschdule mixcolumns
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BMUControlsD = `BMUCTRLW'b000_0111_1000_1_1_0_1_0_0_0_0_0; // aes64im - decrypt keyschdule mixcolumns
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endcase
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end
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@ -29,18 +29,17 @@
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module zknd64 #(parameter WIDTH=32) (
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input logic [WIDTH-1:0] A, B,
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input logic [6:0] Funct7,
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input logic [3:0] RNUM,
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input logic [2:0] ZKNDSelect,
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input logic [3:0] round,
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input logic [3:0] ZKNDSelect,
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output logic [WIDTH-1:0] ZKNDResult
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);
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logic [63:0] aes64dRes, aes64imRes, aes64ks1iRes, aes64ks2Res;
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// RV64
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aes64d aes64d(.rs1(A), .rs2(B), .finalround(ZKNDSelect[2]), .result(aes64dRes)); // decode AES
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aes64im aes64im(.rs1(A), .DataOut(aes64imRes));
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aes64ks1i aes64ks1i(.roundnum(RNUM), .rs1(A), .result(aes64ks1iRes));
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aes64d aes64d(.rs1(A), .rs2(B), .finalround(ZKNDSelect[2]), .aes64im(ZKNDSelect[3]), .result(aes64dRes)); // decode AES
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aes64ks1i aes64ks1i(.round, .rs1(A), .result(aes64ks1iRes));
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aes64ks2 aes64ks2(.rs2(B), .rs1(A), .result(aes64ks2Res));
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mux4 #(WIDTH) zkndmux(aes64dRes, aes64ks1iRes, aes64ks2Res, aes64imRes, ZKNDSelect[1:0], ZKNDResult);
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mux3 #(WIDTH) zkndmux(aes64dRes, aes64ks1iRes, aes64ks2Res, ZKNDSelect[1:0], ZKNDResult);
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endmodule
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@ -29,7 +29,7 @@
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module zkne64 #(parameter WIDTH=32) (
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input logic [WIDTH-1:0] A, B,
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input logic [6:0] Funct7,
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input logic [3:0] RNUM,
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input logic [3:0] round,
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input logic [2:0] ZKNESelect,
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output logic [WIDTH-1:0] ZKNEResult
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);
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@ -38,7 +38,7 @@ module zkne64 #(parameter WIDTH=32) (
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// RV64
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aes64e aes64e(.rs1(A), .rs2(B), .finalround(ZKNESelect[2]), .result(aes64eRes));
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aes64ks1i aes64ks1i(.roundnum(RNUM), .rs1(A), .result(aes64ks1iRes));
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aes64ks1i aes64ks1i(.round, .rs1(A), .result(aes64ks1iRes));
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aes64ks2 aes64ks2(.rs2(B), .rs1(A), .result(aes64ks2Res));
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// 010 is a placeholder to match the select of ZKND's AES64KS1I since they share some instruction
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