Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-01-23 21:14:37 +00:00
Code Issues Packages Projects Releases Wiki Activity

Added function to set SPI clock speed.

Browse Source
This commit is contained in:
Jacob Pease 2024-07-31 11:00:44 -05:00
parent c4ae17c679
commit ee980e39f3
2 changed files with 7 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
fpga/zsbl/spi.c
View File

@ -83,8 +83,13 @@ uint64_t spi_read64() {
return r;
}
void spi_set_clock(uint32_t clkin, uint32_t clkout) {
uint32_t div = (clkin/(2*clkout)) - 1;
write_reg(SPI_SCKDIV, div);
}
// Initialize Sifive FU540 based SPI Controller
void spi_init() {
void spi_init(uint32_t clkin) {
// Enable interrupts
write_reg(SPI_IE, 0x3);

5
fpga/zsbl/spi.h
View File

@ -44,10 +44,6 @@
#define SIFIVE_SPI_CSMODE_MODE_HOLD 2U
#define SIFIVE_SPI_CSMODE_MODE_OFF 3U
#define WAITTX while(!(read_reg(SPI_IP) & 1) {}
#define WAITRX while(read_reg(SPI_IP) & 2) {}
// inline void write_reg(uintptr_t addr, uint32_t value);
//inline uint32_t read_reg(uintptr_t addr);
//inline void spi_sendbyte(uint8_t byte);
@ -57,6 +53,7 @@ uint8_t spi_txrx(uint8_t byte);
//inline uint8_t spi_readbyte();
uint64_t spi_read64();
void spi_init();
void spi_set_clock(uint32_t clkin, uint32_t clkout);
static inline void write_reg(uintptr_t addr, uint32_t value) {
volatile uint32_t * loc = (volatile uint32_t *) addr;