From ee4cf5e94d41f8b4d2501c081d66fa2963c440cf Mon Sep 17 00:00:00 2001
From: Ross Thompson <ross1728@gmail.com>
Date: Thu, 6 Apr 2023 14:18:41 -0500
Subject: [PATCH] Similifed the no byte write enabled version of the sram
 model.

---
 src/generic/mem/ram1p1rwe.sv | 11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)

diff --git a/src/generic/mem/ram1p1rwe.sv b/src/generic/mem/ram1p1rwe.sv
index 480ad3b45..9b0334879 100644
--- a/src/generic/mem/ram1p1rwe.sv
+++ b/src/generic/mem/ram1p1rwe.sv
@@ -90,16 +90,7 @@ module ram1p1rwe #(parameter DEPTH=64, WIDTH=44) (
         // so we can never get we=1, ce=0 for I$.
         if (ce & we)
         // coverage on
-          for(i = 0; i < WIDTH/8; i++) 
-            RAM[addr][i*8 +: 8] <= #1 din[i*8 +: 8];
-  
-    if (WIDTH%8 != 0) // handle msbs if width not a multiple of 8
-      always @(posedge clk)
-        // coverage off
-        // (see the above explanation)
-        if (ce & we)
-        // coverage on
-          RAM[addr][WIDTH-1:WIDTH-WIDTH%8] <= #1 din[WIDTH-1:WIDTH-WIDTH%8];
+          RAM[addr] <= #1 din;
   end
 
 endmodule