Merge pull request #438 from ross144/main

Fixed comments in cboz and cbom tests.
This commit is contained in:
David Harris 2023-10-20 17:15:59 -07:00 committed by GitHub
commit eba346849c
4 changed files with 4 additions and 4 deletions

View File

@ -13,7 +13,7 @@
# and does not write back. Clean: Writes back dirty cacheline if needed # and does not write back. Clean: Writes back dirty cacheline if needed
# and clears dirty bit. Does NOT clear valid bit. Flush: Cleans and then # and clears dirty bit. Does NOT clear valid bit. Flush: Cleans and then
# Invalidates. These operations apply to all caches in the memory system. # Invalidates. These operations apply to all caches in the memory system.
# The tests are divided into three parts one for the data cache, instruction cache # The tests are divided into three parts one for the data cache
# and checks to verify the uncached regions of memory cause exceptions. # and checks to verify the uncached regions of memory cause exceptions.
# ----------- # -----------
# Copyright (c) 2020. RISC-V International. All rights reserved. # Copyright (c) 2020. RISC-V International. All rights reserved.

View File

@ -17,7 +17,7 @@
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# ----------- # -----------
# #
# This assembly file tests the cbo.inval, cbo.clean, and cbo.flush instructions of the RISC-V Zicbom extension. # This assembly file tests the cbo.zero instruction of the RISC-V Zicboz extension.
# #
#include "model_test.h" #include "model_test.h"

View File

@ -13,7 +13,7 @@
# and does not write back. Clean: Writes back dirty cacheline if needed # and does not write back. Clean: Writes back dirty cacheline if needed
# and clears dirty bit. Does NOT clear valid bit. Flush: Cleans and then # and clears dirty bit. Does NOT clear valid bit. Flush: Cleans and then
# Invalidates. These operations apply to all caches in the memory system. # Invalidates. These operations apply to all caches in the memory system.
# The tests are divided into three parts one for the data cache, instruction cache # The tests are divided into three parts one for the data cache
# and checks to verify the uncached regions of memory cause exceptions. # and checks to verify the uncached regions of memory cause exceptions.
# ----------- # -----------
# Copyright (c) 2020. RISC-V International. All rights reserved. # Copyright (c) 2020. RISC-V International. All rights reserved.

View File

@ -17,7 +17,7 @@
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# ----------- # -----------
# #
# This assembly file tests the cbo.inval, cbo.clean, and cbo.flush instructions of the RISC-V Zicbom extension. # This assembly file tests the cbo.zero instruction of the RISC-V Zicboz extension.
# #
#include "model_test.h" #include "model_test.h"