mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
hptw: Simplifed out AnyTLBMiss
This commit is contained in:
parent
784e6cf538
commit
ea2aa469a1
@ -92,7 +92,6 @@ module pagetablewalker
|
|||||||
|
|
||||||
logic PRegEn;
|
logic PRegEn;
|
||||||
logic SelDataTranslation;
|
logic SelDataTranslation;
|
||||||
logic AnyTLBMissM;
|
|
||||||
|
|
||||||
logic [`SVMODE_BITS-1:0] SvMode;
|
logic [`SVMODE_BITS-1:0] SvMode;
|
||||||
assign SvMode = SATP_REGW[`XLEN-1:`XLEN-`SVMODE_BITS];
|
assign SvMode = SATP_REGW[`XLEN-1:`XLEN-`SVMODE_BITS];
|
||||||
@ -111,14 +110,12 @@ module pagetablewalker
|
|||||||
flopenr #(`XLEN) PTEReg(clk, reset, PRegEn, HPTWReadPTE, CurrentPTE); // Capture page table entry from data cache
|
flopenr #(`XLEN) PTEReg(clk, reset, PRegEn, HPTWReadPTE, CurrentPTE); // Capture page table entry from data cache
|
||||||
assign CurrentPPN = CurrentPTE[`PPN_BITS+9:10];
|
assign CurrentPPN = CurrentPTE[`PPN_BITS+9:10];
|
||||||
|
|
||||||
assign AnyTLBMissM = DTLBMissM | ITLBMissF;
|
assign StartWalk = (WalkerState == IDLE) & (DTLBMissM | ITLBMissF);
|
||||||
|
|
||||||
assign StartWalk = (WalkerState == IDLE) & AnyTLBMissM;
|
|
||||||
assign EndWalk = (WalkerState == LEAF) || (WalkerState == FAULT);
|
assign EndWalk = (WalkerState == LEAF) || (WalkerState == FAULT);
|
||||||
|
|
||||||
// Assign PTE descriptors common across all XLEN values
|
// Assign PTE descriptors common across all XLEN values
|
||||||
assign {Dirty, Accessed, Global, User, Executable, Writable, Readable, Valid} = CurrentPTE[7:0];
|
assign {Dirty, Accessed, Global, User, Executable, Writable, Readable, Valid} = CurrentPTE[7:0];
|
||||||
assign LeafPTE = Executable | Writable | Readable;
|
assign LeafPTE = Executable | Readable; // leaf PTE never has only Writable
|
||||||
assign ValidPTE = Valid && ~(Writable && ~Readable);
|
assign ValidPTE = Valid && ~(Writable && ~Readable);
|
||||||
assign ADPageFault = ~Accessed | (MemWrite & ~Dirty);
|
assign ADPageFault = ~Accessed | (MemWrite & ~Dirty);
|
||||||
|
|
||||||
@ -209,7 +206,7 @@ module pagetablewalker
|
|||||||
// Walker FSM
|
// Walker FSM
|
||||||
always_comb
|
always_comb
|
||||||
case (WalkerState)
|
case (WalkerState)
|
||||||
IDLE: if (AnyTLBMissM) NextWalkerState = InitialWalkerState;
|
IDLE: if (StartWalk) NextWalkerState = InitialWalkerState;
|
||||||
else NextWalkerState = IDLE;
|
else NextWalkerState = IDLE;
|
||||||
LEVEL3_SET_ADRE: NextWalkerState = LEVEL3_WDV;
|
LEVEL3_SET_ADRE: NextWalkerState = LEVEL3_WDV;
|
||||||
LEVEL3_WDV: if (HPTWStall) NextWalkerState = LEVEL3_WDV;
|
LEVEL3_WDV: if (HPTWStall) NextWalkerState = LEVEL3_WDV;
|
||||||
|
Loading…
Reference in New Issue
Block a user