Got imperasDV running linux simulation again.

Now need to merge do files.

sim/questa/imperas.ic

@@ -0,0 +1,115 @@
+#--mpdconsole
+#--gdbconsole
+#--showoverrides
+#--showcommands
+
+# Core settings
+--override cpu/priv_version=1.12 
+--override cpu/user_version=20191213
+# arch
+--override cpu/mimpid=0x100
+--override cpu/mvendorid=0x602
+--override cpu/marchid=0x24
+--override refRoot/cpu/tvec_align=64
+--override refRoot/cpu/envcfg_mask=1   # dh 1/26/24 this should be deleted when ImperasDV is updated to allow envcfg.FIOM to be written
+
+# bit manipulation
+--override cpu/add_Extensions=B 
+#--override cpu/add_implicit_Extensions=B 
+--override cpu/bitmanip_version=1.0.0
+
+# More extensions
+--override cpu/Zcb=T
+--override cpu/Zicond=T
+--override cpu/Zfh=T
+--override cpu/Zfa=T
+
+# Cache block operations
+--override cpu/Zicbom=T
+--override cpu/Zicbop=T
+--override cpu/Zicboz=T
+--override cmomp_bytes=64  # Zic64b
+--override cmoz_bytes=64   # Zic64b
+--override lr_sc_grain=8   # Za64rs requires <=64; we use native word size
+
+# 64 KiB continuous huge pages supported
+--override cpu/Svpbmt=T
+--override cpu/Svnapot_page_mask=65536
+
+# SV39 and SV48 supported
+--override cpu/Sv_modes=768
+
+--override cpu/Svinval=T
+
+
+#  clarify
+#--override refRoot/cpu/mtvec_sext=F
+
+--override cpu/tval_ii_code=T
+
+#--override cpu/time_undefined=T
+#--override cpu/cycle_undefined=T
+#--override cpu/instret_undefined=T
+#--override cpu/hpmcounter_undefined=T
+
+--override cpu/reset_address=0x80000000
+
+--override cpu/unaligned=T  # Zicclsm (should be true)
+--override cpu/ignore_non_leaf_DAU=1
+--override cpu/wfi_is_nop=T
+--override cpu/misa_Extensions_mask=0x0 # MISA not writable
+--override cpu/Sstc=T
+
+# unsuccessfully attempt to add B extension (DH 12/21/23)
+#--override cpu/add_Extensions="B"
+#--override cpu/misa_Extensions=0x0014112F
+
+# Enable SVADU hardware update of A/D bits when menvcfg.ADUE=1
+--override cpu/Svadu=T
+#--override cpu/updatePTEA=F
+#--override cpu/updatePTED=F
+
+
+# THIS NEEDS FIXING to 16
+--override cpu/PMP_registers=16
+--override cpu/PMP_undefined=T
+
+# PMA Settings 
+# 'r': read access allowed
+# 'w': write access allowed
+# 'x': execute access allowed
+# 'a': aligned access required
+# 'A': atomic instructions NOT allowed (actually USER1 privilege needed)
+# 'P': push/pop instructions NOT allowed (actually USER2 privilege needed)
+# '1': 1-byte accesses allowed
+# '2': 2-byte accesses allowed
+# '4': 4-byte accesses allowed
+# '8': 8-byte accesses allowed
+# '-', space: ignored (use for input string formatting).
+#
+# SVxx Memory 0x0000000000 0x7FFFFFFFFF
+#
+--callcommand refRoot/cpu/setPMA -lo 0x0000000000 -hi 0x7FFFFFFFFF -attributes " ---a-- ---- " # INITIAL
+--callcommand refRoot/cpu/setPMA -lo 0x0000001000 -hi 0x0000001FFF -attributes " r-x-A- 1248 " # BOOTROM
+--callcommand refRoot/cpu/setPMA -lo 0x0000012100 -hi 0x000001211F -attributes " rw-aA- --48 " # SDC
+--callcommand refRoot/cpu/setPMA -lo 0x0002000000 -hi 0x000200FFFF -attributes " rw-aA- 1248 " # CLINT
+--callcommand refRoot/cpu/setPMA -lo 0x000C000000 -hi 0x000FFFFFFF -attributes " rw-aA- --4- " # PLIC
+--callcommand refRoot/cpu/setPMA -lo 0x0010000000 -hi 0x0010000007 -attributes " rw-aA- 1--- " # UART0 error - 0x10000000 - 0x100000FF
+--callcommand refRoot/cpu/setPMA -lo 0x0010060000 -hi 0x00100600FF -attributes " rw-aA- --4- " # GPIO  error - 0x10069000 - 0x100600FF
+--callcommand refRoot/cpu/setPMA -lo 0x0010040000 -hi 0x0010040FFF -attributes " rw-aA- --4- " # SPI   error - 0x10040000 - 0x10040FFF
+#--callcommand refRoot/cpu/setPMA -lo 0x0080000000 -hi 0x008FFFFFFF -attributes " rwxaA- 1248 " # UNCORE_RAM
+--callcommand refRoot/cpu/setPMA -lo 0x0080000000 -hi 0x008FFFFFFF -attributes " rwx--- 1248 " # UNCORE_RAM
+
+# Enable the Imperas instruction coverage
+#-extlib    refRoot/cpu/cv=imperas.com/intercept/riscvInstructionCoverage/1.0
+#-override  refRoot/cpu/cv/cover=basic
+#-override  refRoot/cpu/cv/extensions=RV32I
+
+# Add Imperas simulator application instruction tracing
+--verbose
+#--trace --tracechange --traceshowicount --tracemode -tracemem ASX --monitornetschange --traceafter 300000000
+--override cpu/debugflags=6 --override cpu/verbose=1
+--override cpu/show_c_prefix=T
+
+# Store simulator output to logfile
+--output imperas.log

sim/questa/run-imperas-linux.sh

@@ -7,4 +7,4 @@ export OTHERFLAGS="+TRACE2LOG_ENABLE=1 +TRACE2LOG_AFTER=100"
 #export OTHERFLAGS="+TRACE2LOG_ENABLE=1  +TRACE2LOG_AFTER=10500000"
 #export OTHERFLAGS=""
 
-vsim -c -do "do questa/wally-linux-imperas.do buildroot buildroot $::env(RISCV) 0 0 0"
+vsim -c -do "do wally-linux-imperas.do buildroot buildroot $::env(RISCV) 0 0 0"

sim/questa/wally-linux-imperas.do

@@ -35,8 +35,8 @@ vlib work
 if {$2 eq "buildroot"} {
     vlog -lint -work work_${1}_${2} \
       +define+USE_IMPERAS_DV \
-      +incdir+../config/deriv/$1 \
-      +incdir+../config/shared \
+      +incdir+../../config/deriv/$1 \
+      +incdir+../../config/shared \
       +incdir+$env(IMPERAS_HOME)/ImpPublic/include/host \
       +incdir+$env(IMPERAS_HOME)/ImpProprietary/include/host \
       $env(IMPERAS_HOME)/ImpPublic/source/host/rvvi/rvviApiPkg.sv    \
@@ -48,10 +48,10 @@ if {$2 eq "buildroot"} {
       $env(IMPERAS_HOME)/ImpProprietary/source/host/idv/trace2log.sv  \
       $env(IMPERAS_HOME)/ImpProprietary/source/host/idv/trace2cov.sv  \
       $env(IMPERAS_HOME)/ImpProprietary/source/host/idv/trace2bin.sv  \
-      ../src/cvw.sv \
-       ../testbench/testbench.sv \
-       ../testbench/common/*.sv ../src/*/*.sv \
-       ../src/*/*/*.sv -suppress 2583
+      ../../src/cvw.sv \
+       ../../testbench/testbench.sv \
+       ../../testbench/common/*.sv ../../src/*/*.sv \
+       ../../src/*/*/*.sv -suppress 2583
 
     #
     # start and run simulation
@@ -61,8 +61,8 @@ if {$2 eq "buildroot"} {
     # visualizer -fprofile+perf+dir=fprofile
     #
     eval vopt +acc work_${1}_${2}.testbench -work work_${1}_${2} -G RISCV_DIR=$3 \
-         -G TEST=$2 -o testbenchopt 
-    eval vsim -lib work_${1}_${2} testbenchopt -suppress 8852,12070,3084,3829,13286  -fatal 7 \
+         -o testbenchopt 
+    eval vsim -lib work_${1}_${2} testbenchopt +TEST=$2 -suppress 8852,12070,3084,3829,13286  -fatal 7 \
         -sv_lib $env(IMPERAS_HOME)/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model \
         $env(OTHERFLAGS)