Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-01-23 04:54:29 +00:00
Code Issues Packages Projects Releases Wiki Activity

Replace /opt/riscv after merge

Browse Source
This commit is contained in:
Jordan Carlin 2024-07-25 21:33:31 -07:00
parent 42a9bbf28d
commit e851812608
No known key found for this signature in database
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
fpga/rvvidaemon/Makefile
View File

@ -1,10 +1,10 @@
all: rvvidaemon all: rvvidaemon
rvvidaemon: rvvidaemon.o rvvidaemon: rvvidaemon.o
gcc $^ /opt/riscv/ImperasDV-OpenHW/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model.so -o rvvidaemon gcc $^ $(RISCV)/ImperasDV-OpenHW/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model.so -o rvvidaemon
%.o:%.c %.o:%.c
gcc -I/opt/riscv/ImperasDV-OpenHW/ImpProprietary/include/host -I/opt/riscv/ImperasDV-OpenHW/ImpPublic/include/host/rvvi/ -c $^ -o $@ gcc -I$(RISCV)/ImperasDV-OpenHW/ImpProprietary/include/host -I$(RISCV)/ImperasDV-OpenHW/ImpPublic/include/host/rvvi/ -c $^ -o $@
clean: clean:
rm *.o rvvidaemon rm *.o rvvidaemon