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Watchdog timeout on buildroot boot is a halting criteria

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This commit is contained in:
David Harris 2024-07-02 14:22:51 -07:00
parent a0729d074b
commit e72c8b8e09
2 changed files with 12 additions and 7 deletions
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14
testbench/common/watchdog.sv
View File

@ -26,7 +26,8 @@
module watchdog #(parameter XLEN, WatchDogTimerThreshold)
(input clk,
input reset
input reset,
string TEST
);
// check for hang up.
@ -46,9 +47,14 @@ module watchdog #(parameter XLEN, WatchDogTimerThreshold)
always_comb begin
WatchDogTimeOut = WatchDogTimerCount >= WatchDogTimerThreshold;
if(WatchDogTimeOut) begin
$display("FAILURE: Watch Dog Time Out triggered. PCW stuck at %x for more than %d cycles", PCW, WatchDogTimerCount);
$stop;
end
if (TEST == "buildroot") $display("Watch Dog Time Out triggered. This is a normal termination for a full buildroot boot. Check sim/<simulator>/logs/buildroot_uart.log to check if the boot printed the login prompt.");
else $display("FAILURE: Watch Dog Time Out triggered. PCW stuck at %x for more than %d cycles", PCW, WatchDogTimerCount);
`ifdef QUESTA
$stop; // if this is changed to $finish for Questa, wally-batch.do does not go to the next step to run coverage, and wally.do terminates without allowing GUI debug
`else
$finish;
`endif
end
end
endmodule

5
testbench/testbench.sv
View File

@ -118,10 +118,9 @@ module testbench;
TEST = "none";
if (!$value$plusargs("ElfFile=%s", ElfFile))
ElfFile = "none";
else begin
end
if (!$value$plusargs("INSTR_LIMIT=%d", INSTR_LIMIT))
INSTR_LIMIT = 0;
//$display("TEST = %s ElfFile = %s", TEST, ElfFile);
// pick tests based on modes supported
//tests = '{};
@ -613,7 +612,7 @@ module testbench;
InstrFName, InstrDName, InstrEName, InstrMName, InstrWName);
// watch for problems such as lockup, reading unitialized memory, bad configs
watchdog #(P.XLEN, 1000000) watchdog(.clk, .reset); // check if PCW is stuck
watchdog #(P.XLEN, 1000000) watchdog(.clk, .reset, .TEST); // check if PCW is stuck
ramxdetector #(P.XLEN, P.LLEN) ramxdetector(clk, dut.core.lsu.MemRWM[1], dut.core.lsu.LSULoadAccessFaultM, dut.core.lsu.ReadDataM,
dut.core.ifu.PCM, InstrM, dut.core.lsu.IEUAdrM, InstrMName);
riscvassertions #(P) riscvassertions(); // check assertions for a legal configuration