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Add number of mismatches exit code to cachesim scripts

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Jordan Carlin 2024-08-11 11:02:23 -07:00
parent e48d577545
commit e6ddebde72
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2 changed files with 20 additions and 8 deletions
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14
bin/CacheSim.py
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@ -192,7 +192,7 @@ class Cache:
return self.__str__() return self.__str__()
if __name__ == "__main__": def main():
parser = argparse.ArgumentParser(description="Simulates a L1 cache.") parser = argparse.ArgumentParser(description="Simulates a L1 cache.")
parser.add_argument('numlines', type=int, help="The number of lines per way (a power of 2)", metavar="L") parser.add_argument('numlines', type=int, help="The number of lines per way (a power of 2)", metavar="L")
parser.add_argument('numways', type=int, help="The number of ways (a power of 2)", metavar='W') parser.add_argument('numways', type=int, help="The number of ways (a power of 2)", metavar='W')
@ -206,7 +206,7 @@ if __name__ == "__main__":
args = parser.parse_args() args = parser.parse_args()
cache = Cache(args.numlines, args.numways, args.addrlen, args.taglen) cache = Cache(args.numlines, args.numways, args.addrlen, args.taglen)
extfile = os.path.expanduser(args.file) extfile = os.path.expanduser(args.file)
nofails = True mismatches = 0
if args.perf: if args.perf:
hits = 0 hits = 0
@ -268,7 +268,7 @@ if __name__ == "__main__":
if not result == lninfo[2]: if not result == lninfo[2]:
print("Result mismatch at address", lninfo[0]+ ". Wally:", lninfo[2]+", Sim:", result) print("Result mismatch at address", lninfo[0]+ ". Wally:", lninfo[2]+", Sim:", result)
nofails = False mismatches += 1
if args.dist: if args.dist:
percent_loads = str(round(100*loads/totalops)) percent_loads = str(round(100*loads/totalops))
percent_stores = str(round(100*stores/totalops)) percent_stores = str(round(100*stores/totalops))
@ -279,5 +279,9 @@ if __name__ == "__main__":
ratio = round(hits/misses,3) ratio = round(hits/misses,3)
print("There were", hits, "hits and", misses, "misses. The hit/miss ratio was", str(ratio)+".") print("There were", hits, "hits and", misses, "misses. The hit/miss ratio was", str(ratio)+".")
if nofails: if mismatches == 0:
print("SUCCESS! There were no mismatches between Wally and the sim.") print("SUCCESS! There were no mismatches between Wally and the sim.")
return mismatches
if __name__ == '__main__':
exit(main())

14
sim/rv64gc_CacheSim.py
View File

@ -29,6 +29,7 @@
################################################################################################ ################################################################################################
import os import os
import argparse import argparse
import subprocess
# NOTE: make sure testbench.sv has the ICache and DCache loggers enabled! # NOTE: make sure testbench.sv has the ICache and DCache loggers enabled!
# This does not check the test output for correctness, run regression for that. # This does not check the test output for correctness, run regression for that.
@ -58,16 +59,17 @@ tests64gc = ["arch64i"]
cachetypes = ["ICache", "DCache"] cachetypes = ["ICache", "DCache"]
simdir = os.path.expandvars("$WALLY/sim") simdir = os.path.expandvars("$WALLY/sim")
if __name__ == '__main__': def main():
parser = argparse.ArgumentParser(description="Runs the cache simulator on all rv64gc test suites") parser = argparse.ArgumentParser(description="Runs the cache simulator on all rv64gc test suites")
parser.add_argument('-p', "--perf", action='store_true', help="Report hit/miss ratio") parser.add_argument('-p', "--perf", action='store_true', help="Report hit/miss ratio")
parser.add_argument('-d', "--dist", action='store_true', help="Report distribution of operations") parser.add_argument('-d', "--dist", action='store_true', help="Report distribution of operations")
parser.add_argument('-s', "--sim", help="Simulator", choices=["questa", "verilator", "vcs"], default="verilator") parser.add_argument('-s', "--sim", help="Simulator", choices=["questa", "verilator", "vcs"], default="verilator")
args = parser.parse_args() args = parser.parse_args()
simargs = "-GI_CACHE_ADDR_LOGGER=1\\\'b1 -GD_CACHE_ADDR_LOGGER=1\\\'b1" simargs = "-GI_CACHE_ADDR_LOGGER=1\\\'b1 -GD_CACHE_ADDR_LOGGER=1\\\'b1"
testcmd = "wsim --sim " + args.sim + " rv64gc {} --args \"" + simargs + "\" > /dev/null" testcmd = "wsim --sim " + args.sim + " rv64gc {} --args \"" + simargs + "\" > /dev/null"
cachecmd = "CacheSim.py 64 4 56 44 -f {}" cachecmd = "CacheSim.py 64 4 56 44 -f {}"
mismatches = 0
if args.perf: if args.perf:
cachecmd += " -p" cachecmd += " -p"
@ -83,5 +85,11 @@ if __name__ == '__main__':
os.system(testcmd.format(test)) os.system(testcmd.format(test))
for cache in cachetypes: for cache in cachetypes:
print(f"{bcolors.OKCYAN}Running the", cache, f"simulator.{bcolors.ENDC}") print(f"{bcolors.OKCYAN}Running the", cache, f"simulator.{bcolors.ENDC}")
os.system(cachecmd.format(args.sim+"/"+cache+".log")) result = subprocess.run(cachecmd.format(args.sim+"/"+cache+".log"), shell=True)
mismatches += result.returncode
print() print()
return mismatches
if __name__ == '__main__':
exit(main())