From e5ead0f5b8aeb104673a72f7b7bff453a51cfb60 Mon Sep 17 00:00:00 2001
From: Limnanthes Serafini <lserafini@hmc.edu>
Date: Tue, 11 Apr 2023 19:29:39 -0700
Subject: [PATCH] Minor logic cleanup (will elaborate in PR)

---
 src/cache/cache.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cache/cache.sv b/src/cache/cache.sv
index c01c714b1..4721eb167 100644
--- a/src/cache/cache.sv
+++ b/src/cache/cache.sv
@@ -122,7 +122,7 @@ module cache #(parameter LINELEN,  NUMLINES,  NUMWAYS, LOGBWPL, WORDLEN, MUXINTE
   // Select victim way for associative caches
   if(NUMWAYS > 1) begin:vict
     cacheLRU #(NUMWAYS, SETLEN, OFFSETLEN, NUMLINES) cacheLRU(
-      .clk, .reset, .CacheEn, .FlushStage, .HitWay, .ValidWay, .VictimWay, .CacheSet, .LRUWriteEn(LRUWriteEn & ~FlushStage),
+      .clk, .reset, .CacheEn, .FlushStage, .HitWay, .ValidWay, .VictimWay, .CacheSet, .LRUWriteEn,
       .SetValid, .PAdr(PAdr[SETTOP-1:OFFSETLEN]), .InvalidateCache, .FlushCache);
   end else 
     assign VictimWay = 1'b1; // one hot.