From e5e57fb54daa98f7cd218e0f17b340a12a4e76fb Mon Sep 17 00:00:00 2001
From: Rose Thompson <ross1728@gmail.com>
Date: Fri, 2 Feb 2024 10:45:38 -0600
Subject: [PATCH] Ugh. This is getting frustrating. Can't seem to get embench
 to run correctly in new script.

---
 sim/regression-wally | 94 +++++++++++++++++++++++---------------------
 sim/wally-batch.do   |  2 +-
 2 files changed, 50 insertions(+), 46 deletions(-)

diff --git a/sim/regression-wally b/sim/regression-wally
index 7c389be70..f4f23a940 100755
--- a/sim/regression-wally
+++ b/sim/regression-wally
@@ -220,48 +220,48 @@ if (nightly):
 
         ### branch predictor simulation
 
-        ["bpred_TWOBIT_6_16_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_TWOBIT_8_16_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_TWOBIT_10_16_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],        
-        ["bpred_TWOBIT_12_16_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_TWOBIT_14_16_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],        
-        ["bpred_TWOBIT_16_16_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_TWOBIT_6_16_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_TWOBIT_8_16_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_TWOBIT_10_16_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],        
-        ["bpred_TWOBIT_12_16_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_TWOBIT_14_16_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],        
-        ["bpred_TWOBIT_16_16_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_16_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_16_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_2_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_2_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_2_12_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_2_12_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_2_14_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_2_14_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_2_16_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_2_16_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_2_6_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_2_6_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_2_8_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_2_8_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_3_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_3_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_4_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_4_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_6_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_10_6_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_12_16_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_12_16_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_14_16_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_14_16_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_16_16_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_16_16_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_6_16_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_6_16_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_8_16_10_0_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
-        ["bpred_GSHARE_8_16_10_1_rv32gc", ["embench"], "+define+PrintHPMCounters=1"],
+        ["bpred_TWOBIT_6_16_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_TWOBIT_8_16_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_TWOBIT_10_16_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],        
+        ["bpred_TWOBIT_12_16_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_TWOBIT_14_16_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],        
+        ["bpred_TWOBIT_16_16_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_TWOBIT_6_16_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_TWOBIT_8_16_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_TWOBIT_10_16_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],        
+        ["bpred_TWOBIT_12_16_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_TWOBIT_14_16_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],        
+        ["bpred_TWOBIT_16_16_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_16_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_16_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_2_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_2_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_2_12_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_2_12_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_2_14_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_2_14_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_2_16_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_2_16_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_2_6_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_2_6_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_2_8_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_2_8_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_3_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_3_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_4_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_4_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_6_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_10_6_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_12_16_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_12_16_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_14_16_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_14_16_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_16_16_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_16_16_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_6_16_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_6_16_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_8_16_10_0_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
+        ["bpred_GSHARE_8_16_10_1_rv32gc", ["embench"], "configOptions", "+define+PrintHPMCounters=1"],
 
 #  enable floating-point tests when lint is fixed
 #        ["f_rv32gc", ["arch32f", "arch32f_divsqrt", "arch32f_fma"]],
@@ -280,13 +280,17 @@ if (nightly):
     for test in derivconfigtests:
         config = test[0];
         tests = test[1];
-        if(len(test) >= 3): defines = test[2]
-        else: defines = ""
+        if(len(test) >= 4 and test[2] == "configOptions"):
+            configOptions = test[3]
+            cmdPrefix = "vsim > {} -c <<!\ndo wally-batch.do "+config+" configOptions"
+        else:
+            configOptions = ""
+            cmdPrefix = "vsim > {} -c <<!\ndo wally-batch.do "+config
         for t in tests:
             tc = TestCase(
                     name=t,
                     variant=config,
-                    cmd="vsim > {} -c <<!\ndo wally-batch.do "+config+" "+t+" "+defines+"\n!",
+                    cmd=cmdPrefix+" "+t+" "+configOptions+"\n!",
                     grepstr="All tests ran without failures")
             configs.append(tc)
 
diff --git a/sim/wally-batch.do b/sim/wally-batch.do
index 7f8c52997..628f361c5 100644
--- a/sim/wally-batch.do
+++ b/sim/wally-batch.do
@@ -89,7 +89,7 @@ if {$2 eq "buildroot"} {
     # **** fix this so we can pass any number of +defines.
     # only allows 3 right now
 
-    vlog -lint -work wkdir/work_${1}_${3}_${4} +incdir+../config/$1 +incdir+../config/deriv/$1 +incdir+../config/shared ../src/cvw.sv ../testbench/testbench.sv ../testbench/common/*.sv   ../src/*/*.sv ../src/*/*/*.sv -suppress 2583 -suppress 7063,2596,13286 $5 $6 $7
+    vlog -lint -work wkdir/work_${1}_${3}_${4} +incdir+../config/$1 +incdir+../config/deriv/$1 +incdir+../config/shared ../src/cvw.sv ../testbench/testbench.sv ../testbench/common/*.sv   ../src/*/*.sv ../src/*/*/*.sv -suppress 2583 -suppress 7063,2596,13286
     # start and run simulation
     # remove +acc flag for faster sim during regressions if there is no need to access internal signals
     vopt wkdir/work_${1}_${3}_${4}.testbench -work wkdir/work_${1}_${3}_${4} -G TEST=$4 -o testbenchopt