Add comments explaining icache inputs

This commit is contained in:
Jarred Allen 2021-03-23 00:07:39 -04:00
parent c47a80213e
commit e4ebb4e31e

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@ -26,18 +26,25 @@
`include "wally-config.vh" `include "wally-config.vh"
module icache( module icache(
// Basic pipeline stuff
input logic clk, reset, input logic clk, reset,
input logic StallF, StallD, input logic StallF, StallD,
input logic FlushD, input logic FlushD,
// Fetch // Upper bits of physical address for PC
input logic [`XLEN-1:12] UpperPCPF, input logic [`XLEN-1:12] UpperPCPF,
// Lower 12 bits of virtual PC address, since it's faster this way
input logic [11:0] LowerPCF, input logic [11:0] LowerPCF,
// Data read in from the ebu unit
input logic [`XLEN-1:0] InstrInF, input logic [`XLEN-1:0] InstrInF,
// Read requested from the ebu unit
output logic [`XLEN-1:0] InstrPAdrF, output logic [`XLEN-1:0] InstrPAdrF,
output logic InstrReadF, output logic InstrReadF,
// High if the instruction currently in the fetch stage is compressed
output logic CompressedF, output logic CompressedF,
// High if the icache is requesting a stall
output logic ICacheStallF, output logic ICacheStallF,
// Decode // The raw (not decompressed) instruction that was requested
// If the next instruction is compressed, the upper 16 bits may be anything
output logic [31:0] InstrRawD output logic [31:0] InstrRawD
); );