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fix controller typo
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@ -93,7 +93,11 @@ module controller import cvw::*; #(parameter cvw_t P) (
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output logic CSRWriteFenceM, // CSR write or fence instruction; needs to flush the following instructions
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output logic [4:0] RdE, RdM, // Pipelined destination registers
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// Forwarding controls
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output logic [4:0] RdW // Register destinations in Execute, Memory, or Writeback stage
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output logic [4:0] RdW, // Register destinations in Execute, Memory, or Writeback stage
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// Debug scan chain
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input logic DebugScanEn,
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input logic DebugScanIn,
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output logic DebugScanOut
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);
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logic [4:0] Rs1E; // pipelined register sources
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