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https://github.com/openhwgroup/cvw
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Restored counter events
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@ -71,7 +71,13 @@ module csrc #(parameter
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//HPMCOUNTER31H = 12'hC9F
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//HPMCOUNTER31H = 12'hC9F
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) (
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) (
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input logic clk, reset,
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input logic clk, reset,
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input logic StallD, StallE, StallM, StallW,
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input logic InstrValidW, LoadStallD, CSRMWriteM,
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input logic InstrValidW, LoadStallD, CSRMWriteM,
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input logic BPPredDirWrongM,
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input logic BTBPredPCWrongM,
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input logic RASPredPCWrongM,
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input logic BPPredClassNonCFIWrongM,
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input logic [4:0] InstrClassM,
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input logic [11:0] CSRAdrM,
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input logic [11:0] CSRAdrM,
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input logic [1:0] PrivilegeModeW,
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input logic [1:0] PrivilegeModeW,
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input logic [`XLEN-1:0] CSRWriteValM,
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input logic [`XLEN-1:0] CSRWriteValM,
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@ -118,20 +124,32 @@ module csrc #(parameter
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// parameterized number of additional counters
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// parameterized number of additional counters
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if (`COUNTERS > 3) begin
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if (`COUNTERS > 3) begin
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logic [`COUNTERS-1:3] WriteHPMCOUNTERM, CounterEvent;
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logic [`COUNTERS-1:3] WriteHPMCOUNTERM;
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logic [`COUNTERS-1:0] CounterEvent;
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logic [63:0] /*HPMCOUNTER_REGW[`COUNTERS-1:3], */ HPMCOUNTERPlusM[`COUNTERS-1:3];
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logic [63:0] /*HPMCOUNTER_REGW[`COUNTERS-1:3], */ HPMCOUNTERPlusM[`COUNTERS-1:3];
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logic [`XLEN-1:0] NextHPMCOUNTERM[`COUNTERS-1:3];
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logic [`XLEN-1:0] NextHPMCOUNTERM[`COUNTERS-1:3];
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genvar i;
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genvar i;
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assign CounterEvent[3] = LoadStallD;
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assign CounterEvent[`COUNTERS-1:4] = 0; // eventually give these sources, including FP instructions, I$/D$ misses, branches and mispredictions
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// could replace special counters 0-2 with this loop for all counters
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assign CounterEvent[0] = 1'b1;
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assign CounterEvent[1] = 1'b0;
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assign CounterEvent[2] = InstrValidW & ~StallW;
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assign CounterEvent[3] = LoadStallD & ~StallD;
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assign CounterEvent[4] = BPPredDirWrongM & ~StallM;
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assign CounterEvent[5] = InstrClassM[0] & ~StallM;
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assign CounterEvent[6] = BTBPredPCWrongM & ~StallM;
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assign CounterEvent[7] = (InstrClassM[4] | InstrClassM[2] | InstrClassM[1]) & ~StallM;
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assign CounterEvent[8] = RASPredPCWrongM & ~StallM;
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assign CounterEvent[9] = InstrClassM[3] & ~StallM;
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assign CounterEvent[10] = BPPredClassNonCFIWrongM & ~StallM;
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assign CounterEvent[`COUNTERS-1:11] = 0; // eventually give these sources, including FP instructions, I$/D$ misses, branches and mispredictions
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for (i = 3; i < `COUNTERS; i = i+1) begin
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for (i = 3; i < `COUNTERS; i = i+1) begin
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assign WriteHPMCOUNTERM[i] = CSRMWriteM && (CSRAdrM == MHPMCOUNTERBASE + i);
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assign WriteHPMCOUNTERM[i] = CSRMWriteM && (CSRAdrM == MHPMCOUNTERBASE + i);
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assign NextHPMCOUNTERM[i][`XLEN-1:0] = WriteHPMCOUNTERM[i] ? CSRWriteValM : HPMCOUNTERPlusM[i][`XLEN-1:0];
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assign NextHPMCOUNTERM[i][`XLEN-1:0] = WriteHPMCOUNTERM[i] ? CSRWriteValM : HPMCOUNTERPlusM[i][`XLEN-1:0];
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always @(posedge clk, posedge reset) // ModelSim doesn't like syntax of passing array element to flop
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always @(posedge clk, posedge reset) // ModelSim doesn't like syntax of passing array element to flop
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if (reset) HPMCOUNTER_REGW[i][`XLEN-1:0] <= #1 0;
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if (reset) HPMCOUNTER_REGW[i][`XLEN-1:0] <= #1 0;
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else HPMCOUNTER_REGW[i][`XLEN-1:0] <= #1 NextHPMCOUNTERM[i];
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else if (~StallW) HPMCOUNTER_REGW[i][`XLEN-1:0] <= #1 NextHPMCOUNTERM[i];
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//flopr #(`XLEN) HPMCOUNTERreg[i](clk, reset, NextHPMCOUNTERM[i], HPMCOUNTER_REGW[i]);
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//flopr #(`XLEN) HPMCOUNTERreg[i](clk, reset, NextHPMCOUNTERM[i], HPMCOUNTER_REGW[i]);
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if (`XLEN==32) begin
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if (`XLEN==32) begin
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@ -142,7 +160,7 @@ module csrc #(parameter
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assign NextHPMCOUNTERHM[i] = WriteHPMCOUNTERHM[i] ? CSRWriteValM : HPMCOUNTERPlusM[i][63:32];
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assign NextHPMCOUNTERHM[i] = WriteHPMCOUNTERHM[i] ? CSRWriteValM : HPMCOUNTERPlusM[i][63:32];
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always @(posedge clk, posedge reset) // ModelSim doesn't like syntax of passing array element to flop
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always @(posedge clk, posedge reset) // ModelSim doesn't like syntax of passing array element to flop
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if (reset) HPMCOUNTERH_REGW[i][`XLEN-1:0] <= #1 0;
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if (reset) HPMCOUNTERH_REGW[i][`XLEN-1:0] <= #1 0;
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else HPMCOUNTERH_REGW[i][`XLEN-1:0] <= #1 NextHPMCOUNTERHM[i];
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else if (~StallW) HPMCOUNTERH_REGW[i][`XLEN-1:0] <= #1 NextHPMCOUNTERHM[i];
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//flopr #(`XLEN) HPMCOUNTERHreg[i](clk, reset, NextHPMCOUNTERHM[i], HPMCOUNTER_REGW[i][63:32]);
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//flopr #(`XLEN) HPMCOUNTERHreg[i](clk, reset, NextHPMCOUNTERHM[i], HPMCOUNTER_REGW[i][63:32]);
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end else begin
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end else begin
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assign HPMCOUNTERPlusM[i] = HPMCOUNTER_REGW[i] + {63'b0, CounterEvent[i] & ~MCOUNTINHIBIT_REGW[i]};
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assign HPMCOUNTERPlusM[i] = HPMCOUNTER_REGW[i] + {63'b0, CounterEvent[i] & ~MCOUNTINHIBIT_REGW[i]};
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