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https://github.com/openhwgroup/cvw
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Fixed typos
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@ -1 +1 @@
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Subproject commit be67c99bd461742aa1c100bcc0732657faae2230
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Subproject commit 307c77b26e070ae85ffea665ad9b642b40e33c86
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@ -44,7 +44,7 @@ module srt #(parameter Nf=52) (
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input logic [1:0] Fmt, // Floats: 00 = 16 bit, 01 = 32 bit, 10 = 64 bit, 11 = 128 bit
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input logic [1:0] Fmt, // Floats: 00 = 16 bit, 01 = 32 bit, 10 = 64 bit, 11 = 128 bit
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input logic W64, // 32-bit ints on XLEN=64
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input logic W64, // 32-bit ints on XLEN=64
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input logic Signed, // Interpret integers as signed 2's complement
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input logic Signed, // Interpret integers as signed 2's complement
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input logic Int, // Choose integer inputss
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input logic Int, // Choose integer inputs
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input logic Sqrt, // perform square root, not divide
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input logic Sqrt, // perform square root, not divide
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output logic rsign,
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output logic rsign,
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output logic [Nf-1:0] Quot, Rem, QuotOTFC, // *** later handle integers
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output logic [Nf-1:0] Quot, Rem, QuotOTFC, // *** later handle integers
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@ -52,7 +52,7 @@ module srt #(parameter Nf=52) (
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output logic [3:0] Flags
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output logic [3:0] Flags
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);
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);
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logic qp, qz, qm; // quotient is +1, 0, or -1
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logic qp, qz, qm; // quotient is +1, 0, or -1
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logic [`NE-1:0] calcExp;
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logic [`NE-1:0] calcExp;
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logic calcSign;
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logic calcSign;
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logic [Nf-1:0] X, Dpreproc;
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logic [Nf-1:0] X, Dpreproc;
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@ -223,17 +223,17 @@ module otfc2 #(parameter N=52) (
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output logic [N-1:0] r
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output logic [N-1:0] r
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);
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);
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// The on-the-fly converter transfers the quotient
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// The on-the-fly converter transfers the quotient
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// bits to the quotient as they come.
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// bits to the quotient as they come.
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//
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//
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// This code follows the psuedocode presented in the
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// This code follows the psuedocode presented in the
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// floating point chapter of the book. Right now,
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// floating point chapter of the book. Right now,
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// it is written for Radix-2 division.
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// it is written for Radix-2 division.
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//
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//
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// QM is Q-1. It allows us to write negative bits
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// QM is Q-1. It allows us to write negative bits
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// without using a costly CPA.
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// without using a costly CPA.
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logic [N+2:0] Q, QM, QNext, QMNext;
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logic [N+2:0] Q, QM, QNext, QMNext;
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// QR and QMR are the shifted versions of Q and QM.
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// QR and QMR are the shifted versions of Q and QM.
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// They are treated as [N-1:r] size signals, and
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// They are treated as [N-1:r] size signals, and
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// discard the r most significant bits of Q and QM.
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// discard the r most significant bits of Q and QM.
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logic [N+1:0] QR, QMR;
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logic [N+1:0] QR, QMR;
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