mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
Possible plic fix?
This commit is contained in:
parent
bcb4ebf888
commit
e2cf941a23
@ -176,7 +176,8 @@ module plic (
|
||||
end
|
||||
|
||||
// pending interrupt requests
|
||||
assign nextIntPending = (intPending | requests) & ~intInProgress;
|
||||
//assign nextIntPending = (intPending | requests) & ~intInProgress;
|
||||
assign nextIntPending = requests;
|
||||
flopr #(`N) intPendingFlop(HCLK,~HRESETn,nextIntPending,intPending);
|
||||
|
||||
// context-dependent signals
|
||||
|
Loading…
Reference in New Issue
Block a user