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fix peripheral test and add it to regression

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bbracker 2022-03-02 23:44:39 +00:00
parent be2f668867
commit e28ca531e0
3 changed files with 10 additions and 11 deletions
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2
pipelined/regression/regression-wally
View File

@ -62,7 +62,7 @@ tc = TestCase(
grepstr="400100000 instructions") grepstr="400100000 instructions")
configs.append(tc) configs.append(tc)
tests64gc = ["arch64i", "arch64priv", "arch64c", "arch64m", "arch64d", "imperas64i", "imperas64f", "imperas64d", "imperas64m", "wally64a", "imperas64c", "wally64priv"] # , "imperas64mmu" "wally64i", #, "testsBP64"] tests64gc = ["arch64i", "arch64priv", "arch64c", "arch64m", "arch64d", "imperas64i", "imperas64f", "imperas64d", "imperas64m", "wally64a", "imperas64c", "wally64priv", "wally64periph"] # , "imperas64mmu" "wally64i", #, "testsBP64"]
for test in tests64gc: for test in tests64gc:
tc = TestCase( tc = TestCase(
name=test, name=test,

3
pipelined/testbench/tests.vh
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@ -1466,7 +1466,6 @@ string imperas32f[] = '{
"rv64i_m/privilege/WALLY-MSTATUS", "002070", "rv64i_m/privilege/WALLY-MSTATUS", "002070",
"rv64i_m/privilege/WALLY-MTVEC", "002070", "rv64i_m/privilege/WALLY-MTVEC", "002070",
"rv64i_m/privilege/WALLY-MVENDORID", "003070", "rv64i_m/privilege/WALLY-MVENDORID", "003070",
"rv64i_m/privilege/WALLY-PERIPH", "0020f0",
"rv64i_m/privilege/WALLY-PMA", "004080", "rv64i_m/privilege/WALLY-PMA", "004080",
"rv64i_m/privilege/WALLY-PMP", "004080", "rv64i_m/privilege/WALLY-PMP", "004080",
"rv64i_m/privilege/WALLY-SCAUSE", "002070", "rv64i_m/privilege/WALLY-SCAUSE", "002070",
@ -1478,7 +1477,7 @@ string imperas32f[] = '{
string wally64periph[] = '{ string wally64periph[] = '{
`WALLYTEST, `WALLYTEST,
"rv64i_m/privilege/WALLY-PERIPH", "3110" "rv64i_m/privilege/WALLY-PERIPH", "22f0"
}; };
string wally32e[] = '{ string wally32e[] = '{

16
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-PERIPH.S
View File

@ -33,7 +33,8 @@ RVTEST_CODE_BEGIN
# --------------------------------------------------------------------------------------------- # ---------------------------------------------------------------------------------------------
j main_code j main_code
# Thanks to MTVEC[1:0], trap handler addresses need to be aligned to a 4-byte boundary
.align 2
################### ###################
################### ###################
trap_handler: ##### trap_handler: #####
@ -801,13 +802,6 @@ RVTEST_DATA_BEGIN
.align 3 .align 3
stack: stack:
.fill 16, 8, 0xdeadbeef .fill 16, 8, 0xdeadbeef
RVTEST_DATA_END
RVMODEL_DATA_BEGIN
# signature output
wally_signature:
.fill 0x200, 8, 0x00000000
#ifdef rvtest_mtrap_routine #ifdef rvtest_mtrap_routine
mtrap_sigptr: mtrap_sigptr:
.fill 64*(XLEN/32),4,0xdeadbeef .fill 64*(XLEN/32),4,0xdeadbeef
@ -817,4 +811,10 @@ mtrap_sigptr:
gpr_save: gpr_save:
.fill 32*(XLEN/32),4,0xdeadbeef .fill 32*(XLEN/32),4,0xdeadbeef
#endif #endif
RVTEST_DATA_END
RVMODEL_DATA_BEGIN
# signature output
wally_signature:
.fill 0x200, 8, 0x00000000
RVMODEL_DATA_END RVMODEL_DATA_END