diff --git a/.gitignore b/.gitignore index 1e651e68e..5619adbff 100644 --- a/.gitignore +++ b/.gitignore @@ -15,7 +15,7 @@ benchmarks/embench/wally*.json #vsim work files to ignore transcript vsim.wlf -pipelined/wlft* +wlft* wlft* /imperas-riscv-tests/FunctionRadix_32.addr /imperas-riscv-tests/FunctionRadix_64.addr @@ -42,8 +42,8 @@ tests/linux-testgen/buildroot-image-output tests/linux-testgen/buildroot-config-src/main.config.old tests/linux-testgen/buildroot-config-src/linux.config.old tests/linux-testgen/buildroot-config-src/busybox.config.old -pipelined/regression/slack-notifier/slack-webhook-url.txt -pipelined/regression/logs +sim/slack-notifier/slack-webhook-url.txt +sim/logs fpga/generator/IP fpga/generator/vivado.* fpga/generator/.Xil/* @@ -59,7 +59,7 @@ examples/C/sum/sum examples/C/fir/fir examples/fp/softfloat_demo/softfloat_demo examples/fp/fpcalc/fpcalc -pipelined/src/fma/fma16_testgen +src/fma/fma16_testgen linux/devicetree/debug/* !linux/devicetree/debug/dump-dts.sh linux/testvector-generation/genCheckpoint.gdb @@ -79,29 +79,24 @@ synthDC/ppa/plots synthDC/wallyplots/ synthDC/runArchive synthDC/hdl -/pipelined/regression/power.saif +sim/power.saif tests/fp/vectors/*.tv synthDC/Summary.csv -pipelined/srt/exptestgen -pipelined/srt/testgen -pipelined/srt/qslc_r4a2 -pipelined/srt/qslc_r4a2.sv -pipelined/srt/testvectors -pipelined/regression/wkdir +sim/wkdir tests/custom/work tests/custom/*/*/*.list tests/custom/*/*/*.elf tests/custom/*/*/*.map tests/custom/*/*/*.memfile tests/custom/crt0/*.a -/pipelined/regression/sd_model.log +sim/sd_model.log fpga/src/sdc/* fpga/src/sdc.tar.gz fpga/src/CopiedFiles_do_not_add_to_repo/* -/pipelined/regression/branch.log +sim/branch.log /fpga/generator/sim/imp-funcsim.v /fpga/generator/sim/imp-timesim.sdf /fpga/generator/sim/imp-timesim.v /fpga/generator/sim/syn-funcsim.v external -pipelined/regression/results +sim/results diff --git a/Install b/Install index 7e509197d..47a91dddd 100644 --- a/Install +++ b/Install @@ -328,6 +328,6 @@ source ./setup.sh # may require some modification for your system. Always cd make - cd pipelined/regression + cd sim ./regression-wally #(depends on having Questa installed) diff --git a/Makefile b/Makefile index b3a054e49..1f540b56c 100644 --- a/Makefile +++ b/Makefile @@ -15,8 +15,8 @@ install: ##ln -s ${RISCV}/imperas-riscv-tests/riscv-ovpsim-plus/bin/Linux64/riscvOVPsimPlus.exe tests/imperas-riscv-tests/riscv-ovpsim-plus/bin/Linux64/riscvOVPsimPlus.exe regression: - make -C pipelined/regression + make -C sim clean: - make clean -C pipelined/regression + make clean -C sim diff --git a/README.md b/README.md index 1fec92868..400df6b3b 100644 --- a/README.md +++ b/README.md @@ -53,7 +53,7 @@ Edit setup.sh and change the following lines to point to the path and license se Run a regression simulation with Questa to prove everything is installed. - $ cd pipelined/regression + $ cd sim $ ./regression-wally (depends on having Questa installed) # Toolchain Installation (Sys Admin) diff --git a/benchmarks/coremark/Makefile b/benchmarks/coremark/Makefile index 8c467d581..e0aa6661d 100644 --- a/benchmarks/coremark/Makefile +++ b/benchmarks/coremark/Makefile @@ -21,8 +21,8 @@ PORT_CFLAGS = -g -mabi=$(ABI) -march=$(ARCH) -static -falign-functions=16 \ all: $(work_dir)/coremark.bare.riscv.elf.memfile run: - (cd ../../pipelined/regression && (time vsim -c -do "do wally-pipelined-batch.do rv$(XLEN)gc coremark" 2>&1 | tee $(work_dir)/coremark.sim.log)) - cd ../../benchmarks/coremark/ + (cd ../../sim && (time vsim -c -do "do wally-pipelined-batch.do rv$(XLEN)gc coremark" 2>&1 | tee $(work_dir)/coremark.sim.log)) + cd ../benchmarks/coremark/ # KMG: added post processing script to give out branch miss proportion along with other stats to the coremark test python3 coremark-postprocess.py diff --git a/benchmarks/embench/Makefile b/benchmarks/embench/Makefile index 21c30cf6e..0d619c90b 100644 --- a/benchmarks/embench/Makefile +++ b/benchmarks/embench/Makefile @@ -34,7 +34,7 @@ sim: modelsim_build_memfile modelsim_run speed # launches modelsim to simulate tests on wally modelsim_run: - (cd ../../pipelined/regression/ && vsim -c -do "do wally-pipelined-batch.do rv32gc embench") + (cd ../../sim/ && vsim -c -do "do wally-pipelined-batch.do rv32gc embench") cd ../../benchmarks/embench/ # builds the objdump based on the compiled c elf files diff --git a/bin/radixcopiesmultiregression.sh b/bin/radixcopiesmultiregression.sh index 1953b1da4..f701dada2 100755 --- a/bin/radixcopiesmultiregression.sh +++ b/bin/radixcopiesmultiregression.sh @@ -10,39 +10,39 @@ currCopies="define DIVCOPIES 32'h1" sed -i "s/$searchRadix/$currRadix/" $configFile sed -i "s/$searchCopies/$currCopies/" $configFile echo regression on Radix :$currRadix: and Copies :$currCopies: -./regression/regression-wally +./sim/regression-wally currRadix="define RADIX 32'h2" currCopies="define DIVCOPIES 32'h2" sed -i "s/$searchRadix/$currRadix/" $configFile sed -i "s/$searchCopies/$currCopies/" $configFile echo regression on Radix :$currRadix: and Copies :$currCopies: -./regression/regression-wally +./sim/regression-wally currRadix="define RADIX 32'h2" currCopies="define DIVCOPIES 32'h4" sed -i "s/$searchRadix/$currRadix/" $configFile sed -i "s/$searchCopies/$currCopies/" $configFile echo regression on Radix :$currRadix: and Copies :$currCopies: -./regression/regression-wally +./sim/regression-wally currRadix="define RADIX 32'h4" currCopies="define DIVCOPIES 32'h1" sed -i "s/$searchRadix/$currRadix/" $configFile sed -i "s/$searchCopies/$currCopies/" $configFile echo regression on Radix :$currRadix: and Copies :$currCopies: -./regression/regression-wally +./sim/regression-wally currRadix="define RADIX 32'h4" currCopies="define DIVCOPIES 32'h2" sed -i "s/$searchRadix/$currRadix/" $configFile sed -i "s/$searchCopies/$currCopies/" $configFile echo regression on Radix :$currRadix: and Copies :$currCopies: -./regression/regression-wally +./sim/regression-wally currRadix="define RADIX 32'h4" currCopies="define DIVCOPIES 32'h4" sed -i "s/$searchRadix/$currRadix/" $configFile sed -i "s/$searchCopies/$currCopies/" $configFile echo regression on Radix :$currRadix: and Copies :$currCopies: -./regression/regression-wally \ No newline at end of file +./sim/regression-wally \ No newline at end of file diff --git a/pipelined/config/buildroot/wally-config.vh b/config/buildroot/wally-config.vh similarity index 100% rename from pipelined/config/buildroot/wally-config.vh rename to config/buildroot/wally-config.vh diff --git a/pipelined/config/fpga/wally-config.vh b/config/fpga/wally-config.vh similarity index 100% rename from pipelined/config/fpga/wally-config.vh rename to config/fpga/wally-config.vh diff --git a/pipelined/config/rv32e/wally-config.vh b/config/rv32e/wally-config.vh similarity index 100% rename from pipelined/config/rv32e/wally-config.vh rename to config/rv32e/wally-config.vh diff --git a/pipelined/config/rv32gc/wally-config.vh b/config/rv32gc/wally-config.vh similarity index 100% rename from pipelined/config/rv32gc/wally-config.vh rename to config/rv32gc/wally-config.vh diff --git a/pipelined/config/rv32i/wally-config.vh b/config/rv32i/wally-config.vh similarity index 100% rename from pipelined/config/rv32i/wally-config.vh rename to config/rv32i/wally-config.vh diff --git a/pipelined/config/rv32imc/wally-config.vh b/config/rv32imc/wally-config.vh similarity index 100% rename from pipelined/config/rv32imc/wally-config.vh rename to config/rv32imc/wally-config.vh diff --git a/pipelined/config/rv64fpquad/wally-config.vh b/config/rv64fpquad/wally-config.vh similarity index 100% rename from pipelined/config/rv64fpquad/wally-config.vh rename to config/rv64fpquad/wally-config.vh diff --git a/pipelined/config/rv64gc/wally-config.vh b/config/rv64gc/wally-config.vh similarity index 100% rename from pipelined/config/rv64gc/wally-config.vh rename to config/rv64gc/wally-config.vh diff --git a/pipelined/config/rv64i/wally-config.vh b/config/rv64i/wally-config.vh similarity index 100% rename from pipelined/config/rv64i/wally-config.vh rename to config/rv64i/wally-config.vh diff --git a/pipelined/config/shared/README b/config/shared/README similarity index 100% rename from pipelined/config/shared/README rename to config/shared/README diff --git a/pipelined/config/shared/wally-shared.vh b/config/shared/wally-shared.vh similarity index 100% rename from pipelined/config/shared/wally-shared.vh rename to config/shared/wally-shared.vh diff --git a/examples/C/fir/Makefile b/examples/C/fir/Makefile index c27e423a5..4e3991e46 100644 --- a/examples/C/fir/Makefile +++ b/examples/C/fir/Makefile @@ -5,7 +5,7 @@ $(TARGET).objdump: $(TARGET) spike $(TARGET) $(TARGET): $(TARGET).c Makefile - riscv64-unknown-elf-gcc -o $(TARGET) -g -O2\ + riscv64-unknown-elf-gcc -o $(TARGET) -g\ -march=rv64gc -mabi=lp64d -mcmodel=medany \ -nostdlib -static -lm -fno-tree-loop-distribute-patterns \ -T../common/test.ld -I../common \ diff --git a/examples/C/lab1matrix/Makefile b/examples/C/lab1matrix/Makefile deleted file mode 100644 index 18c011f4f..000000000 --- a/examples/C/lab1matrix/Makefile +++ /dev/null @@ -1,33 +0,0 @@ -TARGET = matMult - -$(TARGET).objdump: $(TARGET) - riscv64-unknown-elf-objdump -S -D $(TARGET) > $(TARGET).objdump - spike $(TARGET) - -$(TARGET): $(TARGET).c Makefile - riscv64-unknown-elf-gcc -o $(TARGET) -g -O\ - -march=rv64gc -mabi=lp64d -mcmodel=medany \ - -nostdlib -static -lm -fno-tree-loop-distribute-patterns \ - -T../common/test.ld -I../common \ - $(TARGET).c ../common/crt.S ../common/syscalls.c -# Compiler flags: -# -o $(TARGET) defines the name of the output file -# -g generates debugging symbols for gdb -# -O turns on basic optimization; -O3 turns on heavy optimization; omit for no optimization -# -march=rv64gc -mabi=lp64d =mcmodel=medany generates code for RV64GC with doubles and long/ptrs = 64 bits -# -static forces static linking (no dynamic shared libraries on bare metal) -# -lm links the math library if necessary (when #include math.h) -# -nostdlib avoids inserting standard startup files and default libraries -# because we are using crt.s on bare metal -# -fno-tree-loop-distribute-patterns turns replacing loops with memcpy/memset in the std library -# -T specifies the linker file -# -I specifies the include path (e.g. for util.h) -# The last line defines the C files to compile. -# crt.S is needed as our startup file to initialize the processor -# syscalls.c implements printf through the HTIF for Spike -# other flags from riscv-tests makefiles that don't seem to be important -# -ffast-math -DPREALLOCATE=1 -std=gnu99 \ -# -fno-common -fno-builtin-printf -nostartfiles -lgcc \ - -clean: - rm -f $(TARGET) $(TARGET).objdump diff --git a/examples/C/lab1matrix/matMult b/examples/C/lab1matrix/matMult deleted file mode 100755 index e3d3b25dd..000000000 Binary files a/examples/C/lab1matrix/matMult and /dev/null differ diff --git a/examples/C/lab1matrix/matMult.c b/examples/C/lab1matrix/matMult.c deleted file mode 100644 index b794819f9..000000000 --- a/examples/C/lab1matrix/matMult.c +++ /dev/null @@ -1,87 +0,0 @@ -// matMult.c -// mmasserfrye@hmc.edu 30 January 2022 - -#include // supports printf -#include // supports fabs -#include "util.h" // supports verify - -// puts the indicated row of length n from matrix mat into array arr -void getRow(int n, int row, double *mat, double *arr){ - int ind; - for (int i=0; i. diff --git a/fpga/generator/Makefile b/fpga/generator/Makefile index 3ab35b34b..1d07305fb 100644 --- a/fpga/generator/Makefile +++ b/fpga/generator/Makefile @@ -27,7 +27,7 @@ SDC: PreProcessFiles: rm -rf ../src/CopiedFiles_do_not_add_to_repo/ - cp -r ../../pipelined/src/ ../src/CopiedFiles_do_not_add_to_repo/ + cp -r ../../src/ ../src/CopiedFiles_do_not_add_to_repo/ ./insert_debug_comment.sh $(dst)/%.log: %.tcl diff --git a/fpga/generator/wally.tcl b/fpga/generator/wally.tcl index 45444d577..c93abed78 100644 --- a/fpga/generator/wally.tcl +++ b/fpga/generator/wally.tcl @@ -19,7 +19,7 @@ read_verilog -sv [glob -type f ../src/CopiedFiles_do_not_add_to_repo/*/*.sv ../s read_verilog {../src/fpgaTop.v} read_verilog -sv [glob -type f ../src/sdc/*.sv] -set_property include_dirs {../../pipelined/config/fpga ../../pipelined/config/shared} [current_fileset] +set_property include_dirs {../../config/fpga ../../config/shared} [current_fileset] add_files -fileset constrs_1 -norecurse ../constraints/constraints-$boardSubName.xdc diff --git a/setup.imperas.sh b/setup.imperas.sh index e3ac447bf..755a298b5 100644 --- a/setup.imperas.sh +++ b/setup.imperas.sh @@ -31,7 +31,7 @@ export IMPERAS_PERSONALITY=CPUMAN_DV_ASYNC # setup QUESTA (Imperas only command, YMMV) svsetup -questa -pushd pipelined/regression +pushd sim # With IDV IMPERAS_TOOLS=$(pwd)/imperas.ic \ OTHERFLAGS="+TRACE2LOG_ENABLE=1 VERBOSE=1" \ diff --git a/pipelined/regression/Makefile b/sim/Makefile similarity index 62% rename from pipelined/regression/Makefile rename to sim/Makefile index adc7bc718..6a917bcda 100644 --- a/pipelined/regression/Makefile +++ b/sim/Makefile @@ -2,27 +2,27 @@ all: riscoftests memfiles # *** Build old tests/imperas-riscv-tests for now; # Delete this part when the privileged tests transition over to tests/wally-riscv-arch-test # DH: 2/27/22 temporarily commented out imperas-riscv-tests because license expired - #make -C ../../tests/imperas-riscv-tests --jobs - #make -C ../../tests/imperas-riscv-tests XLEN=64 --jobs + #make -C ../tests/imperas-riscv-tests --jobs + #make -C ../tests/imperas-riscv-tests XLEN=64 --jobs # Only compile Imperas tests if they are installed locally. # They are usually a symlink to $RISCV/imperas-riscv-tests and only # get compiled there manually during installation - #make -C ../../addins/imperas-riscv-tests - #make -C ../../addins/imperas-riscv-tests XLEN=64 - #cd ../../addins/imperas-riscv-tests; elf2hex.sh - #cd ../../addins/imperas-riscv-tests; extractFunctionRadix.sh work/*/*/*.elf.objdump + #make -C ../addins/imperas-riscv-tests + #make -C ../addins/imperas-riscv-tests XLEN=64 + #cd ../addins/imperas-riscv-tests; elf2hex.sh + #cd ../addins/imperas-riscv-tests; extractFunctionRadix.sh work/*/*/*.elf.objdump # Link Linux test vectors - #cd ../../tests/linux-testgen/linux-testvectors/;./tvLinker.sh + #cd ../tests/linux-testgen/linux-testvectors/;./tvLinker.sh allclean: clean all clean: - make clean -C ../../tests/riscof + make clean -C ../tests/riscof # make clean -C ../../tests/wally-riscv-arch-test # make allclean -C ../../tests/imperas-riscv-tests riscoftests: # Builds riscv-arch-test 64 and 32-bit versions and builds wally-riscv-arch-test 64 and 32-bit versions - make -C ../../tests/riscof/ + make -C ../tests/riscof/ memfiles: make -f makefile-memfile wally-sim-files --jobs diff --git a/pipelined/regression/buildrootBugFinder.py b/sim/buildrootBugFinder.py similarity index 100% rename from pipelined/regression/buildrootBugFinder.py rename to sim/buildrootBugFinder.py diff --git a/pipelined/regression/fpga-wave.do b/sim/fpga-wave.do similarity index 100% rename from pipelined/regression/fpga-wave.do rename to sim/fpga-wave.do diff --git a/pipelined/regression/imperas.ic b/sim/imperas.ic similarity index 100% rename from pipelined/regression/imperas.ic rename to sim/imperas.ic diff --git a/pipelined/regression/lint-wally b/sim/lint-wally similarity index 100% rename from pipelined/regression/lint-wally rename to sim/lint-wally diff --git a/pipelined/regression/linux-wave.do b/sim/linux-wave.do similarity index 100% rename from pipelined/regression/linux-wave.do rename to sim/linux-wave.do diff --git a/pipelined/regression/make-tests.sh b/sim/make-tests.sh similarity index 88% rename from pipelined/regression/make-tests.sh rename to sim/make-tests.sh index fe4555ff2..de7765086 100755 --- a/pipelined/regression/make-tests.sh +++ b/sim/make-tests.sh @@ -13,4 +13,4 @@ make # exe2memfile.pl work/*/*/*.elf # cd ../linux-testgen/linux-testvectors # ./tvLinker.sh -# cd ../../../pipelined/regression +# cd ../../../regression diff --git a/pipelined/regression/makefile-memfile b/sim/makefile-memfile similarity index 99% rename from pipelined/regression/makefile-memfile rename to sim/makefile-memfile index 646da5ac3..6c2da42fa 100644 --- a/pipelined/regression/makefile-memfile +++ b/sim/makefile-memfile @@ -1,4 +1,4 @@ -ROOT := ../.. +ROOT := .. SUFFIX := work ARCHDIR := $(ROOT)/tests/riscof WALLYDIR:= $(ROOT)/tests/wally-riscv-arch-test diff --git a/pipelined/regression/regression-wally b/sim/regression-wally similarity index 100% rename from pipelined/regression/regression-wally rename to sim/regression-wally diff --git a/pipelined/regression/run-imperasdv-tests.bash b/sim/run-imperasdv-tests.bash similarity index 100% rename from pipelined/regression/run-imperasdv-tests.bash rename to sim/run-imperasdv-tests.bash diff --git a/pipelined/regression/sim-buildroot b/sim/sim-buildroot similarity index 100% rename from pipelined/regression/sim-buildroot rename to sim/sim-buildroot diff --git a/pipelined/regression/sim-buildroot-batch b/sim/sim-buildroot-batch similarity index 100% rename from pipelined/regression/sim-buildroot-batch rename to sim/sim-buildroot-batch diff --git a/pipelined/regression/sim-imperas b/sim/sim-imperas similarity index 100% rename from pipelined/regression/sim-imperas rename to sim/sim-imperas diff --git a/pipelined/regression/sim-testfloat b/sim/sim-testfloat similarity index 100% rename from pipelined/regression/sim-testfloat rename to sim/sim-testfloat diff --git a/pipelined/regression/sim-testfloat-batch b/sim/sim-testfloat-batch similarity index 100% rename from pipelined/regression/sim-testfloat-batch rename to sim/sim-testfloat-batch diff --git a/pipelined/regression/sim-wally b/sim/sim-wally similarity index 100% rename from pipelined/regression/sim-wally rename to sim/sim-wally diff --git a/pipelined/regression/sim-wally-batch b/sim/sim-wally-batch similarity index 100% rename from pipelined/regression/sim-wally-batch rename to sim/sim-wally-batch diff --git a/pipelined/regression/slack-notifier/slack-notifier.py b/sim/slack-notifier/slack-notifier.py similarity index 100% rename from pipelined/regression/slack-notifier/slack-notifier.py rename to sim/slack-notifier/slack-notifier.py diff --git a/pipelined/regression/test b/sim/test similarity index 100% rename from pipelined/regression/test rename to sim/test diff --git a/pipelined/regression/testfloat.do b/sim/testfloat.do similarity index 100% rename from pipelined/regression/testfloat.do rename to sim/testfloat.do diff --git a/pipelined/regression/wally-pipelined-batch.do b/sim/wally-pipelined-batch.do similarity index 100% rename from pipelined/regression/wally-pipelined-batch.do rename to sim/wally-pipelined-batch.do diff --git a/pipelined/regression/wally-pipelined-imperas-no-idv.do b/sim/wally-pipelined-imperas-no-idv.do similarity index 100% rename from pipelined/regression/wally-pipelined-imperas-no-idv.do rename to sim/wally-pipelined-imperas-no-idv.do diff --git a/pipelined/regression/wally-pipelined-imperas.do b/sim/wally-pipelined-imperas.do similarity index 100% rename from pipelined/regression/wally-pipelined-imperas.do rename to sim/wally-pipelined-imperas.do diff --git a/pipelined/regression/wally-pipelined.do b/sim/wally-pipelined.do similarity index 100% rename from pipelined/regression/wally-pipelined.do rename to sim/wally-pipelined.do diff --git a/pipelined/regression/wave-all.do b/sim/wave-all.do similarity index 100% rename from pipelined/regression/wave-all.do rename to sim/wave-all.do diff --git a/pipelined/regression/wave-dos/ahb-muldiv.do b/sim/wave-dos/ahb-muldiv.do similarity index 100% rename from pipelined/regression/wave-dos/ahb-muldiv.do rename to sim/wave-dos/ahb-muldiv.do diff --git a/pipelined/regression/wave-dos/ahb-waves.do b/sim/wave-dos/ahb-waves.do similarity index 100% rename from pipelined/regression/wave-dos/ahb-waves.do rename to sim/wave-dos/ahb-waves.do diff --git a/pipelined/regression/wave-dos/cache-waves.do b/sim/wave-dos/cache-waves.do similarity index 100% rename from pipelined/regression/wave-dos/cache-waves.do rename to sim/wave-dos/cache-waves.do diff --git a/pipelined/regression/wave-dos/default-waves.do b/sim/wave-dos/default-waves.do similarity index 100% rename from pipelined/regression/wave-dos/default-waves.do rename to sim/wave-dos/default-waves.do diff --git a/pipelined/regression/wave-dos/generic.do b/sim/wave-dos/generic.do similarity index 100% rename from pipelined/regression/wave-dos/generic.do rename to sim/wave-dos/generic.do diff --git a/pipelined/regression/wave-dos/linux-waves.do b/sim/wave-dos/linux-waves.do similarity index 100% rename from pipelined/regression/wave-dos/linux-waves.do rename to sim/wave-dos/linux-waves.do diff --git a/pipelined/regression/wave-dos/peripheral-waves.do b/sim/wave-dos/peripheral-waves.do similarity index 100% rename from pipelined/regression/wave-dos/peripheral-waves.do rename to sim/wave-dos/peripheral-waves.do diff --git a/pipelined/regression/wave-fpu.do b/sim/wave-fpu.do similarity index 100% rename from pipelined/regression/wave-fpu.do rename to sim/wave-fpu.do diff --git a/pipelined/regression/wave.do b/sim/wave.do similarity index 100% rename from pipelined/regression/wave.do rename to sim/wave.do diff --git a/pipelined/src/cache/cache.sv b/src/cache/cache.sv similarity index 100% rename from pipelined/src/cache/cache.sv rename to src/cache/cache.sv diff --git a/pipelined/src/cache/cacheLRU.sv b/src/cache/cacheLRU.sv similarity index 100% rename from pipelined/src/cache/cacheLRU.sv rename to src/cache/cacheLRU.sv diff --git a/pipelined/src/cache/cachefsm.sv b/src/cache/cachefsm.sv similarity index 100% rename from pipelined/src/cache/cachefsm.sv rename to src/cache/cachefsm.sv diff --git a/pipelined/src/cache/cacheway.sv b/src/cache/cacheway.sv similarity index 100% rename from pipelined/src/cache/cacheway.sv rename to src/cache/cacheway.sv diff --git a/pipelined/src/cache/subcachelineread.sv b/src/cache/subcachelineread.sv similarity index 100% rename from pipelined/src/cache/subcachelineread.sv rename to src/cache/subcachelineread.sv diff --git a/pipelined/src/ebu/ahbcacheinterface.sv b/src/ebu/ahbcacheinterface.sv similarity index 100% rename from pipelined/src/ebu/ahbcacheinterface.sv rename to src/ebu/ahbcacheinterface.sv diff --git a/pipelined/src/ebu/ahbinterface.sv b/src/ebu/ahbinterface.sv similarity index 100% rename from pipelined/src/ebu/ahbinterface.sv rename to src/ebu/ahbinterface.sv diff --git a/pipelined/src/ebu/buscachefsm.sv b/src/ebu/buscachefsm.sv similarity index 100% rename from pipelined/src/ebu/buscachefsm.sv rename to src/ebu/buscachefsm.sv diff --git a/pipelined/src/ebu/busfsm.sv b/src/ebu/busfsm.sv similarity index 100% rename from pipelined/src/ebu/busfsm.sv rename to src/ebu/busfsm.sv diff --git a/pipelined/src/ebu/controllerinputstage.sv b/src/ebu/controllerinputstage.sv similarity index 100% rename from pipelined/src/ebu/controllerinputstage.sv rename to src/ebu/controllerinputstage.sv diff --git a/pipelined/src/ebu/ebu.sv b/src/ebu/ebu.sv similarity index 100% rename from pipelined/src/ebu/ebu.sv rename to src/ebu/ebu.sv diff --git a/pipelined/src/ebu/ebuarbfsm.sv b/src/ebu/ebuarbfsm.sv similarity index 100% rename from pipelined/src/ebu/ebuarbfsm.sv rename to src/ebu/ebuarbfsm.sv diff --git a/pipelined/src/fpu/fclassify.sv b/src/fpu/fclassify.sv similarity index 100% rename from pipelined/src/fpu/fclassify.sv rename to src/fpu/fclassify.sv diff --git a/pipelined/src/fpu/fcmp.sv b/src/fpu/fcmp.sv similarity index 100% rename from pipelined/src/fpu/fcmp.sv rename to src/fpu/fcmp.sv diff --git a/pipelined/src/fpu/fctrl.sv b/src/fpu/fctrl.sv similarity index 100% rename from pipelined/src/fpu/fctrl.sv rename to src/fpu/fctrl.sv diff --git a/pipelined/src/fpu/fcvt.sv b/src/fpu/fcvt.sv similarity index 100% rename from pipelined/src/fpu/fcvt.sv rename to src/fpu/fcvt.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrt.sv b/src/fpu/fdivsqrt/fdivsqrt.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrt.sv rename to src/fpu/fdivsqrt/fdivsqrt.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtexpcalc.sv b/src/fpu/fdivsqrt/fdivsqrtexpcalc.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtexpcalc.sv rename to src/fpu/fdivsqrt/fdivsqrtexpcalc.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtfgen2.sv b/src/fpu/fdivsqrt/fdivsqrtfgen2.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtfgen2.sv rename to src/fpu/fdivsqrt/fdivsqrtfgen2.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtfgen4.sv b/src/fpu/fdivsqrt/fdivsqrtfgen4.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtfgen4.sv rename to src/fpu/fdivsqrt/fdivsqrtfgen4.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtfsm.sv b/src/fpu/fdivsqrt/fdivsqrtfsm.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtfsm.sv rename to src/fpu/fdivsqrt/fdivsqrtfsm.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtiter.sv b/src/fpu/fdivsqrt/fdivsqrtiter.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtiter.sv rename to src/fpu/fdivsqrt/fdivsqrtiter.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtpostproc.sv b/src/fpu/fdivsqrt/fdivsqrtpostproc.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtpostproc.sv rename to src/fpu/fdivsqrt/fdivsqrtpostproc.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtpreproc.sv b/src/fpu/fdivsqrt/fdivsqrtpreproc.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtpreproc.sv rename to src/fpu/fdivsqrt/fdivsqrtpreproc.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtqsel2.sv b/src/fpu/fdivsqrt/fdivsqrtqsel2.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtqsel2.sv rename to src/fpu/fdivsqrt/fdivsqrtqsel2.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtqsel4.sv b/src/fpu/fdivsqrt/fdivsqrtqsel4.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtqsel4.sv rename to src/fpu/fdivsqrt/fdivsqrtqsel4.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtqsel4cmp.sv b/src/fpu/fdivsqrt/fdivsqrtqsel4cmp.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtqsel4cmp.sv rename to src/fpu/fdivsqrt/fdivsqrtqsel4cmp.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtstage2.sv b/src/fpu/fdivsqrt/fdivsqrtstage2.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtstage2.sv rename to src/fpu/fdivsqrt/fdivsqrtstage2.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtstage4.sv b/src/fpu/fdivsqrt/fdivsqrtstage4.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtstage4.sv rename to src/fpu/fdivsqrt/fdivsqrtstage4.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtuotfc2.sv b/src/fpu/fdivsqrt/fdivsqrtuotfc2.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtuotfc2.sv rename to src/fpu/fdivsqrt/fdivsqrtuotfc2.sv diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtuotfc4.sv b/src/fpu/fdivsqrt/fdivsqrtuotfc4.sv similarity index 100% rename from pipelined/src/fpu/fdivsqrt/fdivsqrtuotfc4.sv rename to src/fpu/fdivsqrt/fdivsqrtuotfc4.sv diff --git a/pipelined/src/fpu/fhazard.sv b/src/fpu/fhazard.sv similarity index 100% rename from pipelined/src/fpu/fhazard.sv rename to src/fpu/fhazard.sv diff --git a/pipelined/src/fpu/fma/fma.sv b/src/fpu/fma/fma.sv similarity index 100% rename from pipelined/src/fpu/fma/fma.sv rename to src/fpu/fma/fma.sv diff --git a/pipelined/src/fpu/fma/fmaadd.sv b/src/fpu/fma/fmaadd.sv similarity index 100% rename from pipelined/src/fpu/fma/fmaadd.sv rename to src/fpu/fma/fmaadd.sv diff --git a/pipelined/src/fpu/fma/fmaalign.sv b/src/fpu/fma/fmaalign.sv similarity index 100% rename from pipelined/src/fpu/fma/fmaalign.sv rename to src/fpu/fma/fmaalign.sv diff --git a/pipelined/src/fpu/fma/fmaexpadd.sv b/src/fpu/fma/fmaexpadd.sv similarity index 100% rename from pipelined/src/fpu/fma/fmaexpadd.sv rename to src/fpu/fma/fmaexpadd.sv diff --git a/pipelined/src/fpu/fma/fmalza.sv b/src/fpu/fma/fmalza.sv similarity index 100% rename from pipelined/src/fpu/fma/fmalza.sv rename to src/fpu/fma/fmalza.sv diff --git a/pipelined/src/fpu/fma/fmamult.sv b/src/fpu/fma/fmamult.sv similarity index 100% rename from pipelined/src/fpu/fma/fmamult.sv rename to src/fpu/fma/fmamult.sv diff --git a/pipelined/src/fpu/fma/fmasign.sv b/src/fpu/fma/fmasign.sv similarity index 100% rename from pipelined/src/fpu/fma/fmasign.sv rename to src/fpu/fma/fmasign.sv diff --git a/pipelined/src/fpu/fpu.sv b/src/fpu/fpu.sv similarity index 100% rename from pipelined/src/fpu/fpu.sv rename to src/fpu/fpu.sv diff --git a/pipelined/src/fpu/fregfile.sv b/src/fpu/fregfile.sv similarity index 100% rename from pipelined/src/fpu/fregfile.sv rename to src/fpu/fregfile.sv diff --git a/pipelined/src/fpu/fsgninj.sv b/src/fpu/fsgninj.sv similarity index 85% rename from pipelined/src/fpu/fsgninj.sv rename to src/fpu/fsgninj.sv index d5568cabe..0db7dc2f3 100755 --- a/pipelined/src/fpu/fsgninj.sv +++ b/src/fpu/fsgninj.sv @@ -29,11 +29,11 @@ `include "wally-config.vh" module fsgninj ( - input logic Xs, Ys, // X and Y sign bits - input logic [`FLEN-1:0] X, // X - input logic [`FMTBITS-1:0] Fmt, // format - input logic [1:0] OpCtrl, // operation control - output logic [`FLEN-1:0] SgnRes // result + input logic Xs, Ys, // X and Y sign bits + input logic [`FLEN-1:0] X, // X + input logic [`FMTBITS-1:0] Fmt, // format + input logic [1:0] OpCtrl, // operation control + output logic [`FLEN-1:0] SgnRes // result ); logic ResSgn; // result sign @@ -54,13 +54,13 @@ module fsgninj ( assign SgnRes = {ResSgn, X[`FLEN-2:0]}; else if (`FPSIZES == 2) assign SgnRes = {~Fmt|ResSgn, X[`FLEN-2:`LEN1], Fmt ? X[`LEN1-1] : ResSgn, X[`LEN1-2:0]}; - else if (`FPSIZES == 3) begin + else if (`FPSIZES == 3) begin logic [2:0] SgnBits; always_comb case (Fmt) - `FMT: SgnBits = {ResSgn, X[`LEN1-1], X[`LEN2-1]}; - `FMT1: SgnBits = {1'b1, ResSgn, X[`LEN2-1]}; - `FMT2: SgnBits = {2'b11, ResSgn}; + `FMT: SgnBits = {ResSgn, X[`LEN1-1], X[`LEN2-1]}; + `FMT1: SgnBits = {1'b1, ResSgn, X[`LEN2-1]}; + `FMT2: SgnBits = {2'b11, ResSgn}; default: SgnBits = {3{1'bx}}; endcase assign SgnRes = {SgnBits[2], X[`FLEN-2:`LEN1], SgnBits[1], X[`LEN1-2:`LEN2], SgnBits[0], X[`LEN2-2:0]}; diff --git a/pipelined/src/fpu/postproc/cvtshiftcalc.sv b/src/fpu/postproc/cvtshiftcalc.sv similarity index 100% rename from pipelined/src/fpu/postproc/cvtshiftcalc.sv rename to src/fpu/postproc/cvtshiftcalc.sv diff --git a/pipelined/src/fpu/postproc/divshiftcalc.sv b/src/fpu/postproc/divshiftcalc.sv similarity index 100% rename from pipelined/src/fpu/postproc/divshiftcalc.sv rename to src/fpu/postproc/divshiftcalc.sv diff --git a/pipelined/src/fpu/postproc/flags.sv b/src/fpu/postproc/flags.sv similarity index 100% rename from pipelined/src/fpu/postproc/flags.sv rename to src/fpu/postproc/flags.sv diff --git a/pipelined/src/fpu/postproc/fmashiftcalc.sv b/src/fpu/postproc/fmashiftcalc.sv similarity index 100% rename from pipelined/src/fpu/postproc/fmashiftcalc.sv rename to src/fpu/postproc/fmashiftcalc.sv diff --git a/pipelined/src/fpu/postproc/negateintres.sv b/src/fpu/postproc/negateintres.sv similarity index 100% rename from pipelined/src/fpu/postproc/negateintres.sv rename to src/fpu/postproc/negateintres.sv diff --git a/pipelined/src/fpu/postproc/normshift.sv b/src/fpu/postproc/normshift.sv similarity index 100% rename from pipelined/src/fpu/postproc/normshift.sv rename to src/fpu/postproc/normshift.sv diff --git a/pipelined/src/fpu/postproc/postprocess.sv b/src/fpu/postproc/postprocess.sv similarity index 100% rename from pipelined/src/fpu/postproc/postprocess.sv rename to src/fpu/postproc/postprocess.sv diff --git a/pipelined/src/fpu/postproc/resultsign.sv b/src/fpu/postproc/resultsign.sv similarity index 100% rename from pipelined/src/fpu/postproc/resultsign.sv rename to src/fpu/postproc/resultsign.sv diff --git a/pipelined/src/fpu/postproc/round.sv b/src/fpu/postproc/round.sv similarity index 100% rename from pipelined/src/fpu/postproc/round.sv rename to src/fpu/postproc/round.sv diff --git a/pipelined/src/fpu/postproc/roundsign.sv b/src/fpu/postproc/roundsign.sv similarity index 100% rename from pipelined/src/fpu/postproc/roundsign.sv rename to src/fpu/postproc/roundsign.sv diff --git a/pipelined/src/fpu/postproc/shiftcorrection.sv b/src/fpu/postproc/shiftcorrection.sv similarity index 100% rename from pipelined/src/fpu/postproc/shiftcorrection.sv rename to src/fpu/postproc/shiftcorrection.sv diff --git a/pipelined/src/fpu/postproc/specialcase.sv b/src/fpu/postproc/specialcase.sv similarity index 100% rename from pipelined/src/fpu/postproc/specialcase.sv rename to src/fpu/postproc/specialcase.sv diff --git a/pipelined/src/fpu/unpack.sv b/src/fpu/unpack.sv similarity index 94% rename from pipelined/src/fpu/unpack.sv rename to src/fpu/unpack.sv index 13addc2e3..356d7e897 100644 --- a/pipelined/src/fpu/unpack.sv +++ b/src/fpu/unpack.sv @@ -48,15 +48,14 @@ module unpack ( unpackinput unpackinputX (.In(X), .Fmt, .Sgn(Xs), .Exp(Xe), .Man(Xm), .En(XEn), .NaN(XNaN), .SNaN(XSNaN), .ExpNonZero(XExpNonZero), - .Zero(XZero), .Inf(XInf), .ExpMax(XExpMax), .FracZero(XFracZero)); + .Zero(XZero), .Inf(XInf), .ExpMax(XExpMax), .FracZero(XFracZero), .Subnorm(XSubnorm)); unpackinput unpackinputY (.In(Y), .Fmt, .Sgn(Ys), .Exp(Ye), .Man(Ym), .En(YEn), .NaN(YNaN), .SNaN(YSNaN), .ExpNonZero(YExpNonZero), - .Zero(YZero), .Inf(YInf), .ExpMax(YExpMax), .FracZero(YFracZero)); + .Zero(YZero), .Inf(YInf), .ExpMax(YExpMax), .FracZero(YFracZero), .Subnorm()); unpackinput unpackinputZ (.In(Z), .Fmt, .Sgn(Zs), .Exp(Ze), .Man(Zm), .En(ZEn), .NaN(ZNaN), .SNaN(ZSNaN), .ExpNonZero(ZExpNonZero), - .Zero(ZZero), .Inf(ZInf), .ExpMax(ZExpMax), .FracZero(ZFracZero)); - // is the input subnormal - assign XSubnorm = ~XExpNonZero & ~XFracZero; -endmodule \ No newline at end of file + .Zero(ZZero), .Inf(ZInf), .ExpMax(ZExpMax), .FracZero(ZFracZero), .Subnorm()); + + endmodule \ No newline at end of file diff --git a/pipelined/src/fpu/unpackinput.sv b/src/fpu/unpackinput.sv similarity index 91% rename from pipelined/src/fpu/unpackinput.sv rename to src/fpu/unpackinput.sv index 34663bd8c..b85077d20 100644 --- a/pipelined/src/fpu/unpackinput.sv +++ b/src/fpu/unpackinput.sv @@ -31,16 +31,17 @@ module unpackinput ( input logic [`FLEN-1:0] In, // inputs from register file input logic En, // enable the input input logic [`FMTBITS-1:0] Fmt, // format signal 00 - single 01 - double 11 - quad 10 - half - output logic Sgn, // sign bits of XYZ - output logic [`NE-1:0] Exp, // exponents of XYZ (converted to largest supported precision) - output logic [`NF:0] Man, // mantissas of XYZ (converted to largest supported precision) - output logic NaN, // is XYZ a NaN - output logic SNaN, // is XYZ a signaling NaN - output logic Zero, // is XYZ zero - output logic Inf, // is XYZ infinity + output logic Sgn, // sign bits of the number + output logic [`NE-1:0] Exp, // exponent of the number (converted to largest supported precision) + output logic [`NF:0] Man, // mantissa of the number (converted to largest supported precision) + output logic NaN, // is the number a NaN + output logic SNaN, // is the number a signaling NaN + output logic Zero, // is the number zero + output logic Inf, // is the number infinity output logic ExpNonZero, // is the exponent not zero output logic FracZero, // is the fraction zero - output logic ExpMax // does In have the maximum exponent (NaN or Inf) + output logic ExpMax, // does In have the maximum exponent (NaN or Inf) + output logic Subnorm // is the number subnormal ); logic [`NF-1:0] Frac; // Fraction of XYZ @@ -261,10 +262,12 @@ module unpackinput ( end // Output logic - assign FracZero = ~|Frac; // is the fraction zero? + assign FracZero = ~|Frac & ~BadNaNBox; // is the fraction zero? assign Man = {ExpNonZero, Frac}; // add the assumed one (or zero if Subnormal or zero) to create the significand assign NaN = ((ExpMax & ~FracZero)|BadNaNBox)&En; // is the input a NaN? assign SNaN = NaN&~Frac[`NF-1]&~BadNaNBox; // is the input a singnaling NaN? - assign Inf = ExpMax & FracZero &En; // is the input infinity? - assign Zero = ~ExpNonZero & FracZero; // is the input zero? + assign Inf = ExpMax & FracZero &En & ~BadNaNBox; // is the input infinity? + assign Zero = ~ExpNonZero & FracZero & ~BadNaNBox; // is the input zero? + assign Subnorm = ~ExpNonZero & ~FracZero & ~BadNaNBox; // is the input subnormal + endmodule \ No newline at end of file diff --git a/pipelined/src/generic/adder.sv b/src/generic/adder.sv similarity index 100% rename from pipelined/src/generic/adder.sv rename to src/generic/adder.sv diff --git a/pipelined/src/generic/aplusbeq0.sv b/src/generic/aplusbeq0.sv similarity index 100% rename from pipelined/src/generic/aplusbeq0.sv rename to src/generic/aplusbeq0.sv diff --git a/pipelined/src/generic/arrs.sv b/src/generic/arrs.sv similarity index 100% rename from pipelined/src/generic/arrs.sv rename to src/generic/arrs.sv diff --git a/pipelined/src/generic/binencoder.sv b/src/generic/binencoder.sv similarity index 100% rename from pipelined/src/generic/binencoder.sv rename to src/generic/binencoder.sv diff --git a/pipelined/src/generic/clockgater.sv b/src/generic/clockgater.sv similarity index 100% rename from pipelined/src/generic/clockgater.sv rename to src/generic/clockgater.sv diff --git a/pipelined/src/generic/counter.sv b/src/generic/counter.sv similarity index 100% rename from pipelined/src/generic/counter.sv rename to src/generic/counter.sv diff --git a/pipelined/src/generic/csa.sv b/src/generic/csa.sv similarity index 100% rename from pipelined/src/generic/csa.sv rename to src/generic/csa.sv diff --git a/pipelined/src/generic/decoder.sv b/src/generic/decoder.sv similarity index 100% rename from pipelined/src/generic/decoder.sv rename to src/generic/decoder.sv diff --git a/pipelined/src/generic/flop/flop.sv b/src/generic/flop/flop.sv similarity index 100% rename from pipelined/src/generic/flop/flop.sv rename to src/generic/flop/flop.sv diff --git a/pipelined/src/generic/flop/flopen.sv b/src/generic/flop/flopen.sv similarity index 100% rename from pipelined/src/generic/flop/flopen.sv rename to src/generic/flop/flopen.sv diff --git a/pipelined/src/generic/flop/flopenl.sv b/src/generic/flop/flopenl.sv similarity index 100% rename from pipelined/src/generic/flop/flopenl.sv rename to src/generic/flop/flopenl.sv diff --git a/pipelined/src/generic/flop/flopenr.sv b/src/generic/flop/flopenr.sv similarity index 100% rename from pipelined/src/generic/flop/flopenr.sv rename to src/generic/flop/flopenr.sv diff --git a/pipelined/src/generic/flop/flopenrc.sv b/src/generic/flop/flopenrc.sv similarity index 100% rename from pipelined/src/generic/flop/flopenrc.sv rename to src/generic/flop/flopenrc.sv diff --git a/pipelined/src/generic/flop/flopens.sv b/src/generic/flop/flopens.sv similarity index 100% rename from pipelined/src/generic/flop/flopens.sv rename to src/generic/flop/flopens.sv diff --git a/pipelined/src/generic/flop/flopr.sv b/src/generic/flop/flopr.sv similarity index 100% rename from pipelined/src/generic/flop/flopr.sv rename to src/generic/flop/flopr.sv diff --git a/pipelined/src/generic/flop/floprc.sv b/src/generic/flop/floprc.sv similarity index 100% rename from pipelined/src/generic/flop/floprc.sv rename to src/generic/flop/floprc.sv diff --git a/pipelined/src/generic/flop/synchronizer.sv b/src/generic/flop/synchronizer.sv similarity index 100% rename from pipelined/src/generic/flop/synchronizer.sv rename to src/generic/flop/synchronizer.sv diff --git a/pipelined/src/generic/lzc.sv b/src/generic/lzc.sv similarity index 100% rename from pipelined/src/generic/lzc.sv rename to src/generic/lzc.sv diff --git a/pipelined/src/generic/mem/ram1p1rwbe.sv b/src/generic/mem/ram1p1rwbe.sv similarity index 100% rename from pipelined/src/generic/mem/ram1p1rwbe.sv rename to src/generic/mem/ram1p1rwbe.sv diff --git a/pipelined/src/generic/mem/ram1p1rwbe_64x128.sv b/src/generic/mem/ram1p1rwbe_64x128.sv similarity index 100% rename from pipelined/src/generic/mem/ram1p1rwbe_64x128.sv rename to src/generic/mem/ram1p1rwbe_64x128.sv diff --git a/pipelined/src/generic/mem/ram1p1rwbe_64x22.sv b/src/generic/mem/ram1p1rwbe_64x22.sv similarity index 100% rename from pipelined/src/generic/mem/ram1p1rwbe_64x22.sv rename to src/generic/mem/ram1p1rwbe_64x22.sv diff --git a/pipelined/src/generic/mem/ram1p1rwbe_64x44.sv b/src/generic/mem/ram1p1rwbe_64x44.sv similarity index 100% rename from pipelined/src/generic/mem/ram1p1rwbe_64x44.sv rename to src/generic/mem/ram1p1rwbe_64x44.sv diff --git a/pipelined/src/generic/mem/ram2p1r1wbe.sv b/src/generic/mem/ram2p1r1wbe.sv similarity index 100% rename from pipelined/src/generic/mem/ram2p1r1wbe.sv rename to src/generic/mem/ram2p1r1wbe.sv diff --git a/pipelined/src/generic/mem/ram2p1r1wbe_1024x36.sv b/src/generic/mem/ram2p1r1wbe_1024x36.sv similarity index 100% rename from pipelined/src/generic/mem/ram2p1r1wbe_1024x36.sv rename to src/generic/mem/ram2p1r1wbe_1024x36.sv diff --git a/pipelined/src/generic/mem/ram2p1r1wbe_1024x68.sv b/src/generic/mem/ram2p1r1wbe_1024x68.sv similarity index 100% rename from pipelined/src/generic/mem/ram2p1r1wbe_1024x68.sv rename to src/generic/mem/ram2p1r1wbe_1024x68.sv diff --git a/pipelined/src/generic/mem/ram2p1r1wbe_64x32.sv b/src/generic/mem/ram2p1r1wbe_64x32.sv similarity index 100% rename from pipelined/src/generic/mem/ram2p1r1wbe_64x32.sv rename to src/generic/mem/ram2p1r1wbe_64x32.sv diff --git a/pipelined/src/generic/mem/rom1p1r.sv b/src/generic/mem/rom1p1r.sv similarity index 100% rename from pipelined/src/generic/mem/rom1p1r.sv rename to src/generic/mem/rom1p1r.sv diff --git a/pipelined/src/generic/mem/rom1p1r_128x32.sv b/src/generic/mem/rom1p1r_128x32.sv similarity index 100% rename from pipelined/src/generic/mem/rom1p1r_128x32.sv rename to src/generic/mem/rom1p1r_128x32.sv diff --git a/pipelined/src/generic/mem/rom1p1r_128x64.sv b/src/generic/mem/rom1p1r_128x64.sv similarity index 100% rename from pipelined/src/generic/mem/rom1p1r_128x64.sv rename to src/generic/mem/rom1p1r_128x64.sv diff --git a/pipelined/src/generic/mux.sv b/src/generic/mux.sv similarity index 100% rename from pipelined/src/generic/mux.sv rename to src/generic/mux.sv diff --git a/pipelined/src/generic/neg.sv b/src/generic/neg.sv similarity index 100% rename from pipelined/src/generic/neg.sv rename to src/generic/neg.sv diff --git a/pipelined/src/generic/onehotdecoder.sv b/src/generic/onehotdecoder.sv similarity index 100% rename from pipelined/src/generic/onehotdecoder.sv rename to src/generic/onehotdecoder.sv diff --git a/pipelined/src/generic/or_rows.sv b/src/generic/or_rows.sv similarity index 100% rename from pipelined/src/generic/or_rows.sv rename to src/generic/or_rows.sv diff --git a/pipelined/src/generic/priorityonehot.sv b/src/generic/priorityonehot.sv similarity index 100% rename from pipelined/src/generic/priorityonehot.sv rename to src/generic/priorityonehot.sv diff --git a/pipelined/src/generic/prioritythermometer.sv b/src/generic/prioritythermometer.sv similarity index 100% rename from pipelined/src/generic/prioritythermometer.sv rename to src/generic/prioritythermometer.sv diff --git a/pipelined/src/hazard/hazard.sv b/src/hazard/hazard.sv similarity index 100% rename from pipelined/src/hazard/hazard.sv rename to src/hazard/hazard.sv diff --git a/pipelined/src/ieu/alu.sv b/src/ieu/alu.sv similarity index 100% rename from pipelined/src/ieu/alu.sv rename to src/ieu/alu.sv diff --git a/pipelined/src/ieu/comparator.sv b/src/ieu/comparator.sv similarity index 100% rename from pipelined/src/ieu/comparator.sv rename to src/ieu/comparator.sv diff --git a/pipelined/src/ieu/controller.sv b/src/ieu/controller.sv similarity index 100% rename from pipelined/src/ieu/controller.sv rename to src/ieu/controller.sv diff --git a/pipelined/src/ieu/datapath.sv b/src/ieu/datapath.sv similarity index 100% rename from pipelined/src/ieu/datapath.sv rename to src/ieu/datapath.sv diff --git a/pipelined/src/ieu/extend.sv b/src/ieu/extend.sv similarity index 100% rename from pipelined/src/ieu/extend.sv rename to src/ieu/extend.sv diff --git a/pipelined/src/ieu/forward.sv b/src/ieu/forward.sv similarity index 100% rename from pipelined/src/ieu/forward.sv rename to src/ieu/forward.sv diff --git a/pipelined/src/ieu/ieu.sv b/src/ieu/ieu.sv similarity index 100% rename from pipelined/src/ieu/ieu.sv rename to src/ieu/ieu.sv diff --git a/pipelined/src/ieu/regfile.sv b/src/ieu/regfile.sv similarity index 100% rename from pipelined/src/ieu/regfile.sv rename to src/ieu/regfile.sv diff --git a/pipelined/src/ieu/shifter.sv b/src/ieu/shifter.sv similarity index 100% rename from pipelined/src/ieu/shifter.sv rename to src/ieu/shifter.sv diff --git a/pipelined/src/ifu/CodeAligner.py b/src/ifu/CodeAligner.py similarity index 100% rename from pipelined/src/ifu/CodeAligner.py rename to src/ifu/CodeAligner.py diff --git a/pipelined/src/ifu/bpred/RASPredictor.sv b/src/ifu/bpred/RASPredictor.sv similarity index 100% rename from pipelined/src/ifu/bpred/RASPredictor.sv rename to src/ifu/bpred/RASPredictor.sv diff --git a/pipelined/src/ifu/bpred/bpred.sv b/src/ifu/bpred/bpred.sv similarity index 100% rename from pipelined/src/ifu/bpred/bpred.sv rename to src/ifu/bpred/bpred.sv diff --git a/pipelined/src/ifu/bpred/btb.sv b/src/ifu/bpred/btb.sv similarity index 100% rename from pipelined/src/ifu/bpred/btb.sv rename to src/ifu/bpred/btb.sv diff --git a/pipelined/src/ifu/bpred/foldedgshare.sv b/src/ifu/bpred/foldedgshare.sv similarity index 100% rename from pipelined/src/ifu/bpred/foldedgshare.sv rename to src/ifu/bpred/foldedgshare.sv diff --git a/pipelined/src/ifu/bpred/globalhistory.sv b/src/ifu/bpred/globalhistory.sv similarity index 100% rename from pipelined/src/ifu/bpred/globalhistory.sv rename to src/ifu/bpred/globalhistory.sv diff --git a/pipelined/src/ifu/bpred/gshare.sv b/src/ifu/bpred/gshare.sv similarity index 100% rename from pipelined/src/ifu/bpred/gshare.sv rename to src/ifu/bpred/gshare.sv diff --git a/pipelined/src/ifu/bpred/localHistoryPredictor.sv b/src/ifu/bpred/localHistoryPredictor.sv similarity index 100% rename from pipelined/src/ifu/bpred/localHistoryPredictor.sv rename to src/ifu/bpred/localHistoryPredictor.sv diff --git a/pipelined/src/ifu/bpred/optgshare.sv b/src/ifu/bpred/optgshare.sv similarity index 100% rename from pipelined/src/ifu/bpred/optgshare.sv rename to src/ifu/bpred/optgshare.sv diff --git a/pipelined/src/ifu/bpred/satCounter2.sv b/src/ifu/bpred/satCounter2.sv similarity index 100% rename from pipelined/src/ifu/bpred/satCounter2.sv rename to src/ifu/bpred/satCounter2.sv diff --git a/pipelined/src/ifu/bpred/speculativeglobalhistory.sv b/src/ifu/bpred/speculativeglobalhistory.sv similarity index 100% rename from pipelined/src/ifu/bpred/speculativeglobalhistory.sv rename to src/ifu/bpred/speculativeglobalhistory.sv diff --git a/pipelined/src/ifu/bpred/speculativegshare.sv b/src/ifu/bpred/speculativegshare.sv similarity index 100% rename from pipelined/src/ifu/bpred/speculativegshare.sv rename to src/ifu/bpred/speculativegshare.sv diff --git a/pipelined/src/ifu/bpred/twoBitPredictor.sv b/src/ifu/bpred/twoBitPredictor.sv similarity index 100% rename from pipelined/src/ifu/bpred/twoBitPredictor.sv rename to src/ifu/bpred/twoBitPredictor.sv diff --git a/pipelined/src/ifu/decompress.sv b/src/ifu/decompress.sv similarity index 100% rename from pipelined/src/ifu/decompress.sv rename to src/ifu/decompress.sv diff --git a/pipelined/src/ifu/ifu.sv b/src/ifu/ifu.sv similarity index 100% rename from pipelined/src/ifu/ifu.sv rename to src/ifu/ifu.sv diff --git a/pipelined/src/ifu/irom.sv b/src/ifu/irom.sv similarity index 100% rename from pipelined/src/ifu/irom.sv rename to src/ifu/irom.sv diff --git a/pipelined/src/ifu/spill.sv b/src/ifu/spill.sv similarity index 100% rename from pipelined/src/ifu/spill.sv rename to src/ifu/spill.sv diff --git a/pipelined/src/lsu/amoalu.sv b/src/lsu/amoalu.sv similarity index 100% rename from pipelined/src/lsu/amoalu.sv rename to src/lsu/amoalu.sv diff --git a/pipelined/src/lsu/atomic.sv b/src/lsu/atomic.sv similarity index 100% rename from pipelined/src/lsu/atomic.sv rename to src/lsu/atomic.sv diff --git a/pipelined/src/lsu/dtim.sv b/src/lsu/dtim.sv similarity index 100% rename from pipelined/src/lsu/dtim.sv rename to src/lsu/dtim.sv diff --git a/pipelined/src/lsu/endianswap.sv b/src/lsu/endianswap.sv similarity index 100% rename from pipelined/src/lsu/endianswap.sv rename to src/lsu/endianswap.sv diff --git a/pipelined/src/lsu/lrsc.sv b/src/lsu/lrsc.sv similarity index 100% rename from pipelined/src/lsu/lrsc.sv rename to src/lsu/lrsc.sv diff --git a/pipelined/src/lsu/lsu.sv b/src/lsu/lsu.sv similarity index 100% rename from pipelined/src/lsu/lsu.sv rename to src/lsu/lsu.sv diff --git a/pipelined/src/lsu/subwordread.sv b/src/lsu/subwordread.sv similarity index 100% rename from pipelined/src/lsu/subwordread.sv rename to src/lsu/subwordread.sv diff --git a/pipelined/src/lsu/subwordwrite.sv b/src/lsu/subwordwrite.sv similarity index 100% rename from pipelined/src/lsu/subwordwrite.sv rename to src/lsu/subwordwrite.sv diff --git a/pipelined/src/lsu/swbytemask.sv b/src/lsu/swbytemask.sv similarity index 100% rename from pipelined/src/lsu/swbytemask.sv rename to src/lsu/swbytemask.sv diff --git a/pipelined/src/mdu/intdivrestoring.sv b/src/mdu/intdivrestoring.sv similarity index 100% rename from pipelined/src/mdu/intdivrestoring.sv rename to src/mdu/intdivrestoring.sv diff --git a/pipelined/src/mdu/intdivrestoringstep.sv b/src/mdu/intdivrestoringstep.sv similarity index 100% rename from pipelined/src/mdu/intdivrestoringstep.sv rename to src/mdu/intdivrestoringstep.sv diff --git a/pipelined/src/mdu/mdu.sv b/src/mdu/mdu.sv similarity index 100% rename from pipelined/src/mdu/mdu.sv rename to src/mdu/mdu.sv diff --git a/pipelined/src/mdu/mul.sv b/src/mdu/mul.sv similarity index 100% rename from pipelined/src/mdu/mul.sv rename to src/mdu/mul.sv diff --git a/pipelined/src/mmu/adrdec.sv b/src/mmu/adrdec.sv similarity index 100% rename from pipelined/src/mmu/adrdec.sv rename to src/mmu/adrdec.sv diff --git a/pipelined/src/mmu/adrdecs.sv b/src/mmu/adrdecs.sv similarity index 100% rename from pipelined/src/mmu/adrdecs.sv rename to src/mmu/adrdecs.sv diff --git a/pipelined/src/mmu/hptw.sv b/src/mmu/hptw.sv similarity index 100% rename from pipelined/src/mmu/hptw.sv rename to src/mmu/hptw.sv diff --git a/pipelined/src/mmu/mmu.sv b/src/mmu/mmu.sv similarity index 100% rename from pipelined/src/mmu/mmu.sv rename to src/mmu/mmu.sv diff --git a/pipelined/src/mmu/pmachecker.sv b/src/mmu/pmachecker.sv similarity index 100% rename from pipelined/src/mmu/pmachecker.sv rename to src/mmu/pmachecker.sv diff --git a/pipelined/src/mmu/pmpadrdec.sv b/src/mmu/pmpadrdec.sv similarity index 100% rename from pipelined/src/mmu/pmpadrdec.sv rename to src/mmu/pmpadrdec.sv diff --git a/pipelined/src/mmu/pmpchecker.sv b/src/mmu/pmpchecker.sv similarity index 100% rename from pipelined/src/mmu/pmpchecker.sv rename to src/mmu/pmpchecker.sv diff --git a/pipelined/src/mmu/tlb.sv b/src/mmu/tlb.sv similarity index 100% rename from pipelined/src/mmu/tlb.sv rename to src/mmu/tlb.sv diff --git a/pipelined/src/mmu/tlbcam.sv b/src/mmu/tlbcam.sv similarity index 100% rename from pipelined/src/mmu/tlbcam.sv rename to src/mmu/tlbcam.sv diff --git a/pipelined/src/mmu/tlbcamline.sv b/src/mmu/tlbcamline.sv similarity index 100% rename from pipelined/src/mmu/tlbcamline.sv rename to src/mmu/tlbcamline.sv diff --git a/pipelined/src/mmu/tlbcontrol.sv b/src/mmu/tlbcontrol.sv similarity index 100% rename from pipelined/src/mmu/tlbcontrol.sv rename to src/mmu/tlbcontrol.sv diff --git a/pipelined/src/mmu/tlblru.sv b/src/mmu/tlblru.sv similarity index 100% rename from pipelined/src/mmu/tlblru.sv rename to src/mmu/tlblru.sv diff --git a/pipelined/src/mmu/tlbmixer.sv b/src/mmu/tlbmixer.sv similarity index 100% rename from pipelined/src/mmu/tlbmixer.sv rename to src/mmu/tlbmixer.sv diff --git a/pipelined/src/mmu/tlbram.sv b/src/mmu/tlbram.sv similarity index 100% rename from pipelined/src/mmu/tlbram.sv rename to src/mmu/tlbram.sv diff --git a/pipelined/src/mmu/tlbramline.sv b/src/mmu/tlbramline.sv similarity index 100% rename from pipelined/src/mmu/tlbramline.sv rename to src/mmu/tlbramline.sv diff --git a/pipelined/src/mmu/vm64check.sv b/src/mmu/vm64check.sv similarity index 100% rename from pipelined/src/mmu/vm64check.sv rename to src/mmu/vm64check.sv diff --git a/pipelined/src/privileged/csr.sv b/src/privileged/csr.sv similarity index 100% rename from pipelined/src/privileged/csr.sv rename to src/privileged/csr.sv diff --git a/pipelined/src/privileged/csrc.sv b/src/privileged/csrc.sv similarity index 100% rename from pipelined/src/privileged/csrc.sv rename to src/privileged/csrc.sv diff --git a/pipelined/src/privileged/csri.sv b/src/privileged/csri.sv similarity index 100% rename from pipelined/src/privileged/csri.sv rename to src/privileged/csri.sv diff --git a/pipelined/src/privileged/csrm.sv b/src/privileged/csrm.sv similarity index 100% rename from pipelined/src/privileged/csrm.sv rename to src/privileged/csrm.sv diff --git a/pipelined/src/privileged/csrs.sv b/src/privileged/csrs.sv similarity index 100% rename from pipelined/src/privileged/csrs.sv rename to src/privileged/csrs.sv diff --git a/pipelined/src/privileged/csrsr.sv b/src/privileged/csrsr.sv similarity index 100% rename from pipelined/src/privileged/csrsr.sv rename to src/privileged/csrsr.sv diff --git a/pipelined/src/privileged/csru.sv b/src/privileged/csru.sv similarity index 100% rename from pipelined/src/privileged/csru.sv rename to src/privileged/csru.sv diff --git a/pipelined/src/privileged/privdec.sv b/src/privileged/privdec.sv similarity index 100% rename from pipelined/src/privileged/privdec.sv rename to src/privileged/privdec.sv diff --git a/pipelined/src/privileged/privileged.sv b/src/privileged/privileged.sv similarity index 100% rename from pipelined/src/privileged/privileged.sv rename to src/privileged/privileged.sv diff --git a/pipelined/src/privileged/privmode.sv b/src/privileged/privmode.sv similarity index 100% rename from pipelined/src/privileged/privmode.sv rename to src/privileged/privmode.sv diff --git a/pipelined/src/privileged/privpiperegs.sv b/src/privileged/privpiperegs.sv similarity index 100% rename from pipelined/src/privileged/privpiperegs.sv rename to src/privileged/privpiperegs.sv diff --git a/pipelined/src/privileged/trap.sv b/src/privileged/trap.sv similarity index 100% rename from pipelined/src/privileged/trap.sv rename to src/privileged/trap.sv diff --git a/pipelined/src/uncore/ahbapbbridge.sv b/src/uncore/ahbapbbridge.sv similarity index 100% rename from pipelined/src/uncore/ahbapbbridge.sv rename to src/uncore/ahbapbbridge.sv diff --git a/pipelined/src/uncore/clint_apb.sv b/src/uncore/clint_apb.sv similarity index 100% rename from pipelined/src/uncore/clint_apb.sv rename to src/uncore/clint_apb.sv diff --git a/pipelined/src/uncore/gpio_apb.sv b/src/uncore/gpio_apb.sv similarity index 100% rename from pipelined/src/uncore/gpio_apb.sv rename to src/uncore/gpio_apb.sv diff --git a/pipelined/src/uncore/plic_apb.sv b/src/uncore/plic_apb.sv similarity index 100% rename from pipelined/src/uncore/plic_apb.sv rename to src/uncore/plic_apb.sv diff --git a/pipelined/src/uncore/ram_ahb.sv b/src/uncore/ram_ahb.sv similarity index 100% rename from pipelined/src/uncore/ram_ahb.sv rename to src/uncore/ram_ahb.sv diff --git a/pipelined/src/uncore/rom_ahb.sv b/src/uncore/rom_ahb.sv similarity index 100% rename from pipelined/src/uncore/rom_ahb.sv rename to src/uncore/rom_ahb.sv diff --git a/pipelined/src/uncore/uartPC16550D.sv b/src/uncore/uartPC16550D.sv similarity index 100% rename from pipelined/src/uncore/uartPC16550D.sv rename to src/uncore/uartPC16550D.sv diff --git a/pipelined/src/uncore/uart_apb.sv b/src/uncore/uart_apb.sv similarity index 100% rename from pipelined/src/uncore/uart_apb.sv rename to src/uncore/uart_apb.sv diff --git a/pipelined/src/uncore/uncore.sv b/src/uncore/uncore.sv similarity index 100% rename from pipelined/src/uncore/uncore.sv rename to src/uncore/uncore.sv diff --git a/pipelined/src/wally/cvw.sv b/src/wally/cvw.sv similarity index 100% rename from pipelined/src/wally/cvw.sv rename to src/wally/cvw.sv diff --git a/pipelined/src/wally/wallypipelinedcore.sv b/src/wally/wallypipelinedcore.sv similarity index 100% rename from pipelined/src/wally/wallypipelinedcore.sv rename to src/wally/wallypipelinedcore.sv diff --git a/pipelined/src/wally/wallypipelinedsoc.sv b/src/wally/wallypipelinedsoc.sv similarity index 100% rename from pipelined/src/wally/wallypipelinedsoc.sv rename to src/wally/wallypipelinedsoc.sv diff --git a/synthDC/.synopsys_dc.setup b/synthDC/.synopsys_dc.setup index 8b0ba0309..2fdc11c27 100755 --- a/synthDC/.synopsys_dc.setup +++ b/synthDC/.synopsys_dc.setup @@ -48,10 +48,12 @@ set cache_read $cache_write lappend search_path ./scripts lappend search_path ./hdl lappend search_path ./mapped -set memory /home/jstine/WallyMem/rv64gc/ -lappend target_library $memory/ts3n28hpcpa128x64m8m_130a/NLDM/ts3n28hpcpa128x64m8m_tt0p9v25c.db -lappend target_library $memory/ts1n28hpcpsvtb64x128m4sw_180a/NLDM/ts1n28hpcpsvtb64x128m4sw_tt0p9v25c.db -lappend target_library $memory/ts1n28hpcpsvtb64x44m4sw_180a/NLDM/ts1n28hpcpsvtb64x44m4sw_tt0p9v25c.db +if {$tech == "tsmc28"} { + set memory /home/jstine/WallyMem/rv64gc/ + lappend target_library $memory/ts3n28hpcpa128x64m8m_130a/NLDM/ts3n28hpcpa128x64m8m_tt0p9v25c.db + lappend target_library $memory/ts1n28hpcpsvtb64x128m4sw_180a/NLDM/ts1n28hpcpsvtb64x128m4sw_tt0p9v25c.db + lappend target_library $memory/ts1n28hpcpsvtb64x44m4sw_180a/NLDM/ts1n28hpcpsvtb64x44m4sw_tt0p9v25c.db +} # Set up User Information set company "Oklahoma State University" diff --git a/synthDC/Makefile b/synthDC/Makefile index fd9667942..4d39e7c87 100755 --- a/synthDC/Makefile +++ b/synthDC/Makefile @@ -25,10 +25,9 @@ export USESRAM ?= 0 time := $(shell date +%F-%H-%M) hash := $(shell git rev-parse --short HEAD) export OUTPUTDIR := runs/$(DESIGN)_$(CONFIG)_$(MOD)_$(TECH)nm_$(FREQ)_MHz_$(time)_$(TITLE)_$(hash) -export OUTPUTDIR := runs/$(DESIGN)_$(CONFIG)_$(MOD)_$(TECH)nm_$(FREQ)_MHz_$(time)_$(TITLE)_$(hash) export SAIFPOWER ?= 0 -OLDCONFIGDIR ?= ${WALLY}/pipelined/config +OLDCONFIGDIR ?= ${WALLY}/config export CONFIGDIR ?= $(OUTPUTDIR)/config @@ -64,20 +63,25 @@ else sed -i 's/NUMWAYS.*/NUMWAYS 1/g' $(CONFIGDIR)/wally-config.vh sed -i 's/BPRED_SIZE.*/BPRED_SIZE 5/g' $(CONFIGDIR)/wally-config.vh -ifneq ($(filter $(CONFIG), $(DIRS32)),) - sed -i "s/DTIM_RANGE.*/DTIM_RANGE 34\'h01FF/g" $(CONFIGDIR)/wally-config.vh - sed -i "s/IROM_RANGE.*/IROM_RANGE 34\'h01FF/g" $(CONFIGDIR)/wally-config.vh - sed -i "s/BOOTROM_RANGE.*/BOOTROM_RANGE 34\'h01FF/g" $(CONFIGDIR)/wally-config.vh - sed -i "s/UNCORE_RAM_RANGE.*/UNCORE_RAM_RANGE 34\'h01FF/g" $(CONFIGDIR)/wally-config.vh -else ifneq ($(filter $(CONFIG), $(DIRS64)),) - sed -i "s/DTIM_RANGE.*/DTIM_RANGE 56\'h01FF/g" $(CONFIGDIR)/wally-config.vh - sed -i "s/IROM_RANGE.*/IROM_RANGE 56\'h01FF/g" $(CONFIGDIR)/wally-config.vh - sed -i "s/BOOTROM_RANGE.*/BOOTROM_RANGE 56\'h01FF/g" $(CONFIGDIR)/wally-config.vh - sed -i "s/UNCORE_RAM_RANGE.*/UNCORE_RAM_RANGE 56\'h01FF/g" $(CONFIGDIR)/wally-config.vh -else - $(info $(CONFIG) does not exist in $(DIRS32) or $(DIRS64)) - @echo "Config not in list, RAM_RANGE will be unmodified" -endif + @echo "match32" + @echo $(filter $(CONFIG), $(DIRS32)) + @echo "match64" + @echo $(filter $(CONFIG), $(DIRS64)) + + ifneq ($(filter $(CONFIG), $(DIRS32)),) + sed -i "s/DTIM_RANGE.*/DTIM_RANGE 34\'h01FF/g" $(CONFIGDIR)/wally-config.vh + sed -i "s/IROM_RANGE.*/IROM_RANGE 34\'h01FF/g" $(CONFIGDIR)/wally-config.vh + sed -i "s/BOOTROM_RANGE.*/BOOTROM_RANGE 34\'h01FF/g" $(CONFIGDIR)/wally-config.vh + sed -i "s/UNCORE_RAM_RANGE.*/UNCORE_RAM_RANGE 34\'h01FF/g" $(CONFIGDIR)/wally-config.vh + else ifneq ($(filter $(CONFIG), $(DIRS64)),) + sed -i "s/DTIM_RANGE.*/DTIM_RANGE 56\'h01FF/g" $(CONFIGDIR)/wally-config.vh + sed -i "s/IROM_RANGE.*/IROM_RANGE 56\'h01FF/g" $(CONFIGDIR)/wally-config.vh + sed -i "s/BOOTROM_RANGE.*/BOOTROM_RANGE 56\'h01FF/g" $(CONFIGDIR)/wally-config.vh + sed -i "s/UNCORE_RAM_RANGE.*/UNCORE_RAM_RANGE 56\'h01FF/g" $(CONFIGDIR)/wally-config.vh + else + $(info $(CONFIG) does not exist in $(DIRS32) or $(DIRS64)) + @echo "Config not in list, RAM_RANGE will be unmodified" + endif endif ifeq ($(MOD), FPUoff) @@ -99,7 +103,7 @@ else ifeq ($(MOD), noPriv) endif ifeq ($(SAIFPOWER), 1) - cp -f ../pipelined/regression/power.saif . + cp -f ../sim/power.saif . endif diff --git a/synthDC/scripts/synth.tcl b/synthDC/scripts/synth.tcl index ba6e4bb96..1040f35ce 100755 --- a/synthDC/scripts/synth.tcl +++ b/synthDC/scripts/synth.tcl @@ -19,7 +19,7 @@ set_host_options -max_cores $::env(MAXCORES) # get outputDir and configDir from environment (Makefile) set outputDir $::env(OUTPUTDIR) set cfg $::env(CONFIGDIR) -set hdl_src "../pipelined/src" +set hdl_src "../src" set saifpower $::env(SAIFPOWER) set maxopt $::env(MAXOPT) set drive $::env(DRIVE) diff --git a/pipelined/testbench/common/functionName.sv b/testbench/common/functionName.sv similarity index 100% rename from pipelined/testbench/common/functionName.sv rename to testbench/common/functionName.sv diff --git a/pipelined/testbench/common/instrNameDecTB.sv b/testbench/common/instrNameDecTB.sv similarity index 100% rename from pipelined/testbench/common/instrNameDecTB.sv rename to testbench/common/instrNameDecTB.sv diff --git a/pipelined/testbench/common/instrTrackerTB.sv b/testbench/common/instrTrackerTB.sv similarity index 100% rename from pipelined/testbench/common/instrTrackerTB.sv rename to testbench/common/instrTrackerTB.sv diff --git a/pipelined/testbench/common/wallyTracer.sv b/testbench/common/wallyTracer.sv similarity index 100% rename from pipelined/testbench/common/wallyTracer.sv rename to testbench/common/wallyTracer.sv diff --git a/pipelined/testbench/fp/case.sh b/testbench/fp/case.sh similarity index 100% rename from pipelined/testbench/fp/case.sh rename to testbench/fp/case.sh diff --git a/pipelined/testbench/sdc/ram2sdLoad.py b/testbench/sdc/ram2sdLoad.py similarity index 100% rename from pipelined/testbench/sdc/ram2sdLoad.py rename to testbench/sdc/ram2sdLoad.py diff --git a/pipelined/testbench/sdc/ramdisk2.hex b/testbench/sdc/ramdisk2.hex similarity index 100% rename from pipelined/testbench/sdc/ramdisk2.hex rename to testbench/sdc/ramdisk2.hex diff --git a/pipelined/testbench/sdc/run_tb.do b/testbench/sdc/run_tb.do similarity index 100% rename from pipelined/testbench/sdc/run_tb.do rename to testbench/sdc/run_tb.do diff --git a/pipelined/testbench/sdc/sdModel.sv b/testbench/sdc/sdModel.sv similarity index 100% rename from pipelined/testbench/sdc/sdModel.sv rename to testbench/sdc/sdModel.sv diff --git a/pipelined/testbench/sdc/sd_crc_16.sv b/testbench/sdc/sd_crc_16.sv similarity index 100% rename from pipelined/testbench/sdc/sd_crc_16.sv rename to testbench/sdc/sd_crc_16.sv diff --git a/pipelined/testbench/sdc/sd_crc_7.sv b/testbench/sdc/sd_crc_7.sv similarity index 100% rename from pipelined/testbench/sdc/sd_crc_7.sv rename to testbench/sdc/sd_crc_7.sv diff --git a/pipelined/testbench/sdc/sd_defines.h b/testbench/sdc/sd_defines.h similarity index 100% rename from pipelined/testbench/sdc/sd_defines.h rename to testbench/sdc/sd_defines.h diff --git a/pipelined/testbench/sdc/sd_top_tb.sv b/testbench/sdc/sd_top_tb.sv similarity index 100% rename from pipelined/testbench/sdc/sd_top_tb.sv rename to testbench/sdc/sd_top_tb.sv diff --git a/pipelined/testbench/sdc/wave.do b/testbench/sdc/wave.do similarity index 100% rename from pipelined/testbench/sdc/wave.do rename to testbench/sdc/wave.do diff --git a/pipelined/testbench/testbench-fp.sv b/testbench/testbench-fp.sv similarity index 99% rename from pipelined/testbench/testbench-fp.sv rename to testbench/testbench-fp.sv index 62a739c40..8d6826b70 100644 --- a/pipelined/testbench/testbench-fp.sv +++ b/testbench/testbench-fp.sv @@ -31,7 +31,7 @@ // steps to run FMA Tests // 1) create test vectors in riscv-wally/Tests/fp with: ./run-all.sh -// 2) go to riscv-wally/pipelined/testbench/fp/Tests +// 2) go to cvw/testbench/fp/Tests // 3) run ./sim-fma-batch module testbenchfp; parameter TEST="none"; diff --git a/pipelined/testbench/testbench-linux.sv b/testbench/testbench-linux.sv similarity index 100% rename from pipelined/testbench/testbench-linux.sv rename to testbench/testbench-linux.sv diff --git a/pipelined/testbench/testbench.sv b/testbench/testbench.sv similarity index 99% rename from pipelined/testbench/testbench.sv rename to testbench/testbench.sv index 853a6e001..a3fa2c093 100644 --- a/pipelined/testbench/testbench.sv +++ b/testbench/testbench.sv @@ -238,7 +238,7 @@ logic [3:0] dummy; else memfilename = {pathname, tests[test], ".elf.memfile"}; if (`FPGA) begin string romfilename, sdcfilename; - romfilename = {"../../tests/custom/fpga-test-sdc/bin/fpga-test-sdc.memfile"}; + romfilename = {"../tests/custom/fpga-test-sdc/bin/fpga-test-sdc.memfile"}; sdcfilename = {"../testbench/sdc/ramdisk2.hex"}; $readmemh(romfilename, dut.uncore.uncore.bootrom.bootrom.memory.ROM); $readmemh(sdcfilename, sdcard.sdcard.FLASHmem); diff --git a/pipelined/testbench/testbench_imperas.sv b/testbench/testbench_imperas.sv similarity index 100% rename from pipelined/testbench/testbench_imperas.sv rename to testbench/testbench_imperas.sv diff --git a/pipelined/testbench/tests-fp.vh b/testbench/tests-fp.vh similarity index 100% rename from pipelined/testbench/tests-fp.vh rename to testbench/tests-fp.vh diff --git a/pipelined/testbench/tests.vh b/testbench/tests.vh similarity index 99% rename from pipelined/testbench/tests.vh rename to testbench/tests.vh index 1d094254e..f119b0a4e 100644 --- a/pipelined/testbench/tests.vh +++ b/testbench/tests.vh @@ -33,13 +33,13 @@ // *** remove MYIMPERASTEST cases when ported string tvpaths[] = '{ - "../../addins/imperas-riscv-tests/work/", - "../../tests/riscof/work/riscv-arch-test/", - "../../tests/riscof/work/wally-riscv-arch-test/", - "../../tests/imperas-riscv-tests/work/", - "../../benchmarks/coremark/work/", - "../../addins/embench-iot/", - "../../tests/custom/work/" + "../addins/imperas-riscv-tests/work/", + "../tests/riscof/work/riscv-arch-test/", + "../tests/riscof/work/wally-riscv-arch-test/", + "../tests/imperas-riscv-tests/work/", + "../benchmarks/coremark/work/", + "../addins/embench-iot/", + "../tests/custom/work/" }; string coremark[] = '{ diff --git a/tests/testgen/privileged/run.sh b/tests/testgen/privileged/run.sh index 1fa3a9d01..d1afb4e89 100755 --- a/tests/testgen/privileged/run.sh +++ b/tests/testgen/privileged/run.sh @@ -11,7 +11,7 @@ printf "\n\n#####\nStarting tests for $1\n#####\n\n" if [[ "$2" != "-simonly" ]] then - cd $WALLY/pipelined/testgen/privileged + cd $WALLY/testgen/privileged python3 "testgen-$1.py" printf "\n\n#####\nRan testgen-$1.py Making...\n#####\n\n\n" @@ -48,7 +48,7 @@ fi if [[ "$2" == "-sim" || "$2" == "-simonly" ]] then printf "\n\n\n#####\nSimulating!\n#####\n\n" - cd $WALLY/pipelined/regression + cd $WALLY/sim vsim -do wally-privileged.do -c fi