From 7e06775135d4211f52590774eabe2676f45a81b3 Mon Sep 17 00:00:00 2001
From: Ross Thompson <ross1728@gmail.com>
Date: Fri, 28 Jul 2023 11:20:29 -0500
Subject: [PATCH] Fixed a very subtle combinational loop bug the SSTC
 implementation of csrs.sv.  STIMCMPH did not assign all XLEN bits of
 CSRSReadValM so dc_shell produced d-latches and vivado created a
 combinational loop.

---
 src/privileged/csrs.sv | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/privileged/csrs.sv b/src/privileged/csrs.sv
index 84a4d0a4b..a15be83e6 100644
--- a/src/privileged/csrs.sv
+++ b/src/privileged/csrs.sv
@@ -157,7 +157,7 @@ module csrs import cvw::*;  #(parameter cvw_t P) (
                    IllegalCSRSAccessM = 1;
                  end
       STIMECMPH: if (STCE) 
-                   CSRSReadValM[31:0] = STIMECMP_REGW[63:32];
+                   CSRSReadValM = {{(P.XLEN-32){1'b0}}, STIMECMP_REGW[63:32]};
                  else begin // not supported for RV64
                    CSRSReadValM = 0;
                    IllegalCSRSAccessM = 1;
@@ -168,4 +168,4 @@ module csrs import cvw::*;  #(parameter cvw_t P) (
                end       
     endcase
   end
-endmodule
\ No newline at end of file
+endmodule