diff --git a/bin/wsim b/bin/wsim
index d930277ec..72ec81a22 100755
--- a/bin/wsim
+++ b/bin/wsim
@@ -90,9 +90,10 @@ else: EnableLog = 0
 prefix = ""
 if (args.lockstep or args.lockstepverbose or args.fcov or args.fcovimp):
     if (args.sim == "questa" or args.sim == "vcs"):
-        prefix = "IMPERAS_TOOLS=" + os.path.join(WALLY, "config", args.config, "imperas.ic")
-        if not os.path.isfile(prefix): # If config is a derivative, look for imperas.ic in derivative configs
-            prefix = "IMPERAS_TOOLS=" + os.path.join(WALLY, "config", "deriv", args.config, "imperas.ic")
+        imperasicPath = os.path.join(WALLY, "config", args.config, "imperas.ic")
+        if not os.path.isfile(imperasicPath): # If config is a derivative, look for imperas.ic in derivative configs
+            imperasicPath = os.path.join(WALLY, "config", "deriv", args.config, "imperas.ic")
+        prefix = "IMPERAS_TOOLS=" + imperasicPath
 # Force Questa to use 64-bit mode, sometimes it defaults to 32-bit even on 64-bit machines
 if (args.sim == "questa"):
     prefix = "MTI_VCO_MODE=64 " + prefix
diff --git a/src/fpu/fctrl.sv b/src/fpu/fctrl.sv
index ab9cad093..d04fc45fa 100755
--- a/src/fpu/fctrl.sv
+++ b/src/fpu/fctrl.sv
@@ -248,9 +248,9 @@ module fctrl import cvw::*;  #(parameter cvw_t P) (
                       // coverage off
                       // Not covered in testing because rv64gc is not RV64Q or RV32D
                       7'b1011001: if (P.ZFA_SUPPORTED & P.XLEN == 32 & P.D_SUPPORTED & Funct3D == 3'b000) 
-                                                  ControlsD = `FCTRLW'b1_0_01_00_101_0_0_0_0_0; // fmvp.d.x  (Zfa) 
+                                                  ControlsD = `FCTRLW'b1_0_00_00_011_0_0_0_1_0; // fmvp.d.x  (Zfa) 
                       7'b1011011: if (P.ZFA_SUPPORTED & P.XLEN == 64 & P.Q_SUPPORTED & Funct3D == 3'b000) 
-                                                  ControlsD = `FCTRLW'b1_0_01_00_101_0_0_0_0_0; // fmvp.q.x  (Zfa)
+                                                  ControlsD = `FCTRLW'b1_0_00_00_011_0_0_0_1_0; // fmvp.q.x  (Zfa)
                       // coverage on
                    endcase
       endcase