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Temporary change of plic uart id to 10.

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This commit is contained in:
Ross Thompson 2022-03-28 10:23:20 -05:00
parent f97caf37db
commit dc74a6ba9c
1 changed files with 1 additions and 1 deletions
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2
pipelined/config/fpga/wally-config.vh
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@ -123,7 +123,7 @@
// Interrupt configuration
`define PLIC_NUM_SRC 53
`define PLIC_UART_ID 4
`define PLIC_UART_ID 10
`define TWO_BIT_PRELOAD "../config/fpga/twoBitPredictor.txt"
`define BTB_PRELOAD "../config/fpga/BTBPredictor.txt"