diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-MMU-SV32.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-MMU-SV32.S index 868e85016..c0ab048cd 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-MMU-SV32.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-MMU-SV32.S @@ -44,14 +44,14 @@ # test 12.3.1.1.1 write page tables / entries to phyiscal memory # sv32 Page table (See Figure 12.12***): # Level 1 page table, situated at 0x8000D000 -.4byte 0x8000D000, 0x20004CC1, 0x0 # points to level 0 page table A +.4byte 0x8000D000, 0x20004C01, 0x0 # points to level 0 page table A .4byte 0x8000D004, 0x200000CB, 0x0 # Vaddr 0x400000 Paddr 0x80000000: aligned megapage, W=0, used for execute tests -.4byte 0x8000D008, 0x200054E1, 0x0 # points to level 0 page table B +.4byte 0x8000D008, 0x20005421, 0x0 # points to level 0 page table B .4byte 0x8000D00C, 0x000800C7, 0x0 # Vaddr 0xC00000: misaligned megapage .4byte 0x8000D800, 0x200000CF, 0x0 # Vaddr 0x80000000 Paddr 0x80000000: aligned megapage (program and data memory) .4byte 0x8000D804, 0x200000DF, 0x0 # Vaddr 0x80400000 Paddr 0x80000000: aligned megapage, U=1 (aliased with program and data memory) # Level 0 page table A -.4byte 0x80013000, 0x200070D1, 0x0 # Vaddr 0x0000: bad PTE points to level -1 table +.4byte 0x80013000, 0x20007011, 0x0 # Vaddr 0x0000: bad PTE points to level -1 table .4byte 0x80013004, 0x202000DF, 0x0 # Vaddr 0x1000 Paddr 0x80800000: aligned kilopage, U=1 .4byte 0x80013008, 0x202010D5, 0x0 # Vaddr 0x2000: pad PTE has W but not R .4byte 0x8001300C, 0x20200817, 0x0 # Vaddr 0x3000: A=0, should cause read fault diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-TEST-LIB-32.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-TEST-LIB-32.S index e33d80f8f..8bde7f9cd 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-TEST-LIB-32.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-TEST-LIB-32.S @@ -21,18 +21,15 @@ // OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /////////////////////////////////////////// -#include "riscv_test_macros.h" -#include "compliance_test.h" -#include "compliance_io.h" +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") -RV_COMPLIANCE_RV64M - -RV_COMPLIANCE_CODE_BEGIN - - - RVTEST_IO_INIT - RVTEST_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000) - RVTEST_IO_WRITE_STR(x31, "Test Begin\n") +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN # --------------------------------------------------------------------------------------------- @@ -624,18 +621,15 @@ terminate_test: ecall # writes mcause to the output. csrw mtvec, x4 # restore original trap handler to halt program - # --------------------------------------------------------------------------------------------- - RVTEST_IO_WRITE_STR(x31, "Test End\n") +RVTEST_CODE_END +RVMODEL_HALT - # --------------------------------------------------------------------------------------------- - - RV_COMPLIANCE_HALT - -RV_COMPLIANCE_CODE_END - -# Input data section. - .data +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +RVTEST_DATA_END .align 2 # align stack to 4 byte boundary bottom_of_stack: @@ -643,15 +637,29 @@ bottom_of_stack: top_of_stack: -# Output data section. -RV_COMPLIANCE_DATA_BEGIN -.align 2 # align output to 4 byte boundary +RVMODEL_DATA_BEGIN + +// next lines through test cases copied over from old framework test_1_res: .fill 1024, 4, -1 -RV_COMPLIANCE_DATA_END +RVMODEL_DATA_END + +#ifdef rvtest_mtrap_routine + +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*(XLEN/32),4,0xdeadbeef + +#endif .align 2 test_cases: - # These tests follow the testing plan in Chapter 12 of the riscv-wally textbook *** what is it called and how do I refer to it? + diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-MMU-SV39.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-MMU-SV39.S index 7888b7a97..e78226b54 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-MMU-SV39.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-MMU-SV39.S @@ -47,22 +47,22 @@ test_contents: # test 12.3.1.1.1 write page tables / entries to phyiscal memory # sv39 page table (See Figure 12.12***): # Level 2 page table, situated at 0x8000D000 -.8byte 0x000000008000D000, 0x0000000020004CC1, 0x0 # points to level 1 page table A -.8byte 0x000000008000D008, 0x00000000200050C1, 0x0 # points to level 1 page table B +.8byte 0x000000008000D000, 0x0000000020004C01, 0x0 # points to level 1 page table A +.8byte 0x000000008000D008, 0x0000000020005001, 0x0 # points to level 1 page table B .8byte 0x000000008000D010, 0x00000000200000CF, 0x0 # Vaddr 0x8000_0000, Paddr 0x80000000: aligned gigapage (program and data memory) .8byte 0x000000008000D018, 0x00004000004000C7, 0x0 # Vaddr 0xC000_0000: misaligned gigapage -.8byte 0x000000008000DFF8, 0x00000000200054E1, 0x0 # points to level 1 page table C +.8byte 0x000000008000DFF8, 0x0000000020005421, 0x0 # points to level 1 page table C # Level 1 page table A -.8byte 0x0000000080013000, 0x00000000200060C1, 0x0 # points to level 0 page table A +.8byte 0x0000000080013000, 0x0000000020006001, 0x0 # points to level 0 page table A # Level 1 page table B .8byte 0x0000000080014000, 0x00000000200000CB, 0x0 # Vaddr 0x4000_0000, Paddr 0x80000000: aligned megapage, W=0, used for execution tests .8byte 0x0000000080014008, 0x00000400000080C3, 0x0 # Vaddr 0x4020_0000: misaligned megapage .8byte 0x0000000080014010, 0x00000000200000DF, 0x0 # Vaddr 0x4040_0000, Paddr 0x80000000: aligned megapage, aliased with program, U=1 .8byte 0x0000000080014018, 0x00000000210800C9, 0x0 # Vaddr 0x4060_0000, Paddr 0x84200000: R=0, reads should fault # Level 1 page table C -.8byte 0x0000000080015FF8, 0x00000000200058C1, 0x0 # points to level 0 page table B +.8byte 0x0000000080015FF8, 0x0000000020005801, 0x0 # points to level 0 page table B # Level 0 page table A -.8byte 0x0000000080018000, 0x00000000200070D1, 0x0 # Vaddr 0x0000: bad PTE points to level -1 table +.8byte 0x0000000080018000, 0x0000000020007001, 0x0 # Vaddr 0x0000: bad PTE points to level -1 table .8byte 0x0000000080018008, 0x00000000200800DF, 0x0 # Vaddr 0x1000, Paddr = 0x80200000: aligned kilopage .8byte 0x0000000080018010, 0x00000000200810D5, 0x0 # Vaddr 0x2000: bad PTE has W but not R .8byte 0x0000000080018018, 0x0000000020080817, 0x0 # Vaddr 0x3000 Paddr 0x80202000: A=0, should cause read fault diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-MMU-SV48.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-MMU-SV48.S index ad9c5e06b..6fc6424e0 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-MMU-SV48.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-MMU-SV48.S @@ -46,28 +46,28 @@ # test 12.3.1.1.1 write page tables / entries to phyiscal memory # sv48 page table (See Figure 12.12***): # Level 3 page table, situated at 0x8000D000 -.8byte 0x000000008000D000, 0x0000000020004CC1, 0x0 # points to level 2 page table A -.8byte 0x000000008000D008, 0x00000000200050C1, 0x0 # points to level 2 page table B +.8byte 0x000000008000D000, 0x0000000020004C01, 0x0 # points to level 2 page table A +.8byte 0x000000008000D008, 0x0000000020005001, 0x0 # points to level 2 page table B .8byte 0x000000008000D010, 0x00000000000000C7, 0x0 # Vaddr 0x010000000000, Paddr 0x00000000: aligned terapage .8byte 0x000000008000D018, 0x00004000004000C7, 0x0 # Vaddr 0x018000000000, misaligned terapage -.8byte 0x000000008000DFF8, 0x00000000200054E1, 0x0 # points to level 2 page table C +.8byte 0x000000008000DFF8, 0x0000000020005421, 0x0 # points to level 2 page table C # Level 2 page table A -.8byte 0x0000000080013010, 0x00000000200060C1, 0x0 # points to level 1 page table A +.8byte 0x0000000080013010, 0x0000000020006001, 0x0 # points to level 1 page table A # Level 2 page table B .8byte 0x0000000080014000, 0x00000000200000CB, 0x0 # Vaddr 0x008000000000, Paddr 0x80000000: aligned gigapage used for execution tests .8byte 0x0000000080014008, 0x00000000200000DF, 0x0 # Vaddr 0x008040000000, Paddr 0x80000000: aligned gigapage (aliased with data and instr memory) U bit set. .8byte 0x0000000080014010, 0x00000400080000C3, 0x0 # Vaddr 0x008080000000, misaligned gigapage # Level 2 page table C -.8byte 0x0000000080015FF8, 0x00000000200058C1, 0x0 # points to level 1 page table B +.8byte 0x0000000080015FF8, 0x0000000020005801, 0x0 # points to level 1 page table B # Level 1 page table A .8byte 0x0000000080018000, 0x00000000200000CF, 0x0 # Vaddr 0x80000000, Paddr 0x80000000: aligned megapage (data and instr memory) -.8byte 0x0000000080018008, 0x00000000200064C1, 0x0 # points to level 0 page table A +.8byte 0x0000000080018008, 0x0000000020006401, 0x0 # points to level 0 page table A .8byte 0x0000000080018010, 0x000000C0000400CF, 0x0 # Vaddr 0x80400000, misaligned megapage .8byte 0x0000000080018018, 0x00000000214800C9, 0x0 # Vaddr 0x80600000, Paddr 0x85200000: aligned megapage, R=0 # Level 1 page table B -.8byte 0x0000000080016FF8, 0x00000000200068C1, 0x0 # points to level 0 page table B +.8byte 0x0000000080016FF8, 0x0000000020006801, 0x0 # points to level 0 page table B # Level 0 page table A -.8byte 0x0000000080019000, 0x00000000200070D1, 0x0 # Vaddr 0x80200000, Paddr 0x8001C000: bad PTE points to level -1 table +.8byte 0x0000000080019000, 0x0000000020007001, 0x0 # Vaddr 0x80200000, Paddr 0x8001C000: bad PTE points to level -1 table .8byte 0x0000000080019008, 0x00000000200800DF, 0x0 # Vaddr 0x80201000, Paddr 0x80200000: aligned kilopage .8byte 0x0000000080019010, 0x00000000200810DF, 0x0 # Vaddr 0x80202000, Paddr 0x80204000: bad PTE has W but not R .8byte 0x0000000080019018, 0x0000000020080817, 0x0 # Vaddr 0x80203000, Paddr 0x80202000: A=0, should cause read fault