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Merge branch 'main' of github.com:ross144/cvw

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This commit is contained in:
Ross Thompson 2023-08-25 17:05:04 -05:00
commit d8ace44ba3
4 changed files with 13 additions and 13 deletions
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4
fpga/constraints/constraints-vcu118.xdc
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@ -117,10 +117,10 @@ set_property PULLUP true [get_ports {SDCCmd}]
set_input_delay -clock [get_clocks mmcm_clkout1] -min -add_delay 2.500 [get_ports {SDCDat[*]}] set_input_delay -clock [get_clocks mmcm_clkout1] -min -add_delay 2.500 [get_ports {SDCDat[*]}]
set_input_delay -clock [get_clocks mmcm_clkout1] -max -add_delay 21.000 [get_ports {SDCDat[*]}] set_input_delay -clock [get_clocks mmcm_clkout1] -max -add_delay 10.000 [get_ports {SDCDat[*]}]
set_input_delay -clock [get_clocks mmcm_clkout1] -min -add_delay 2.500 [get_ports {SDCCmd}] set_input_delay -clock [get_clocks mmcm_clkout1] -min -add_delay 2.500 [get_ports {SDCCmd}]
set_input_delay -clock [get_clocks mmcm_clkout1] -max -add_delay 14.000 [get_ports {SDCCmd}] set_input_delay -clock [get_clocks mmcm_clkout1] -max -add_delay 10.000 [get_ports {SDCCmd}]
set_output_delay -clock [get_clocks mmcm_clkout1] -min -add_delay 2.000 [get_ports {SDCCmd}] set_output_delay -clock [get_clocks mmcm_clkout1] -min -add_delay 2.000 [get_ports {SDCCmd}]

2
fpga/generator/xlnx_ddr4-vcu118.tcl
View File

@ -38,7 +38,7 @@ set_property -dict [list CONFIG.C0.ControllerType {DDR4_SDRAM} \
CONFIG.C0.DDR4_AxiNarrowBurst {false} \ CONFIG.C0.DDR4_AxiNarrowBurst {false} \
CONFIG.Reference_Clock {Differential} \ CONFIG.Reference_Clock {Differential} \
CONFIG.ADDN_UI_CLKOUT1.INSERT_VIP {0} \ CONFIG.ADDN_UI_CLKOUT1.INSERT_VIP {0} \
CONFIG.ADDN_UI_CLKOUT1_FREQ_HZ {50} \ CONFIG.ADDN_UI_CLKOUT1_FREQ_HZ {71} \
CONFIG.ADDN_UI_CLKOUT2.INSERT_VIP {0} \ CONFIG.ADDN_UI_CLKOUT2.INSERT_VIP {0} \
CONFIG.ADDN_UI_CLKOUT2_FREQ_HZ {300} \ CONFIG.ADDN_UI_CLKOUT2_FREQ_HZ {300} \
CONFIG.ADDN_UI_CLKOUT3.INSERT_VIP {0} \ CONFIG.ADDN_UI_CLKOUT3.INSERT_VIP {0} \

4
linux/buildroot-packages/package-source/fpga-axi-sdc.c
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@ -272,6 +272,8 @@ static void sdc_reset(struct mmc_host * mmc) {
struct sdc_host * host = mmc_priv(mmc); struct sdc_host * host = mmc_priv(mmc);
uint32_t card_detect = 0; uint32_t card_detect = 0;
spin_lock_init(&host->lock);
spin_lock_irq(&host->lock); spin_lock_irq(&host->lock);
sdc_set_clock(host, 400000); sdc_set_clock(host, 400000);
@ -462,7 +464,7 @@ static int axi_sdc_probe(struct platform_device * pdev) {
return ret; return ret;
} }
spin_lock_init(&host->lock); //spin_lock_init(&host->lock);
platform_set_drvdata(pdev, host); platform_set_drvdata(pdev, host);
return 0; return 0;

16
linux/devicetree/wally-vcu118.dts
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@ -9,20 +9,20 @@
chosen { chosen {
linux,initrd-end = <0x85c43a00>; linux,initrd-end = <0x85c43a00>;
linux,initrd-start = <0x84200000>; linux,initrd-start = <0x84200000>;
bootargs = "root=/dev/vda ro"; bootargs = "root=/dev/vda ro console=ttyS0,115200";
stdout-path = "/soc/uart@10000000"; stdout-path = "/soc/uart@10000000";
}; };
memory@80000000 { memory@80000000 {
device_type = "memory"; device_type = "memory";
reg = <0x00 0x80000000 0x00 0x08000000>; reg = <0x00 0x80000000 0x00 0x10000000>;
}; };
cpus { cpus {
#address-cells = <0x01>; #address-cells = <0x01>;
#size-cells = <0x00>; #size-cells = <0x00>;
clock-frequency = <0x2FAF080>; clock-frequency = <0x43B5FC0>;
timebase-frequency = <0x2FAF080>; timebase-frequency = <0x43B5FC0>;
cpu@0 { cpu@0 {
phandle = <0x01>; phandle = <0x01>;
@ -51,7 +51,7 @@
uart@10000000 { uart@10000000 {
interrupts = <0x0a>; interrupts = <0x0a>;
interrupt-parent = <0x03>; interrupt-parent = <0x03>;
clock-frequency = <0x2FAF080>; clock-frequency = <0x43B5FC0>;
reg = <0x00 0x10000000 0x00 0x100>; reg = <0x00 0x10000000 0x00 0x100>;
compatible = "ns16550a"; compatible = "ns16550a";
}; };
@ -74,10 +74,8 @@
fifo-depth = <256>; fifo-depth = <256>;
bus-width = <4>; bus-width = <4>;
interrupt-parent = <0x03>; interrupt-parent = <0x03>;
clock = <0x2FAF080>; clock = <0x43B5FC0>;
max-frequency = <0x989680>; max-frequency = <0xF4240>;
cap-sd-highspeed;
cap-mmc-highspeed;
no-sdio; no-sdio;
}; };