From d6a1ee114178f6696741e035fbd1fa91d361e8b6 Mon Sep 17 00:00:00 2001 From: slmnemo Date: Fri, 10 Jun 2022 20:30:04 -0700 Subject: [PATCH] Added comments to signals added so the bus is easier to analyze --- pipelined/src/lsu/busfsm.sv | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/pipelined/src/lsu/busfsm.sv b/pipelined/src/lsu/busfsm.sv index e549ee526..c156f6b9f 100644 --- a/pipelined/src/lsu/busfsm.sv +++ b/pipelined/src/lsu/busfsm.sv @@ -164,7 +164,9 @@ module busfsm #(parameter integer WordCountThreshold, (BusCurrState == STATE_BUS_UNCACHED_READ); assign LSUBusRead = UnCachedLSUBusRead | (BusCurrState == STATE_BUS_FETCH) | (BusCurrState == STATE_BUS_READY & DCacheFetchLine); - assign UnCachedRW = UnCachedLSUBusWrite | UnCachedLSUBusRead; + + // Makes bus only do uncached reads/writes when we actually do uncached reads/writes. Needed because CacheableM is 0 when flushing cache. + assign UnCachedRW = UnCachedLSUBusWrite | UnCachedLSUBusRead; assign DCacheBusAck = (BusCurrState == STATE_BUS_FETCH & WordCountFlag & LSUBusAck) | (BusCurrState == STATE_BUS_WRITE & WordCountFlag & LSUBusAck);