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https://github.com/openhwgroup/cvw
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added 8 and 128 bit versions, adjusted alu
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@ -3,6 +3,14 @@
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// & mmasserfrye@hmc.edu
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// & mmasserfrye@hmc.edu
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// Measure PPA of various building blocks
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// Measure PPA of various building blocks
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module ppa_comparator_8 #(parameter WIDTH=8) (
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input logic [WIDTH-1:0] a, b,
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input logic sgnd,
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output logic [1:0] flags);
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ppa_comparator #(WIDTH) comp (.*);
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endmodule
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module ppa_comparator_16 #(parameter WIDTH=16) (
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module ppa_comparator_16 #(parameter WIDTH=16) (
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input logic [WIDTH-1:0] a, b,
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input logic [WIDTH-1:0] a, b,
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input logic sgnd,
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input logic sgnd,
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@ -27,6 +35,14 @@ module ppa_comparator_64 #(parameter WIDTH=64) (
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ppa_comparator #(WIDTH) comp (.*);
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ppa_comparator #(WIDTH) comp (.*);
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endmodule
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endmodule
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module ppa_comparator_128 #(parameter WIDTH=128) (
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input logic [WIDTH-1:0] a, b,
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input logic sgnd,
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output logic [1:0] flags);
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ppa_comparator #(WIDTH) comp (.*);
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endmodule
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module ppa_comparator #(parameter WIDTH=16) (
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module ppa_comparator #(parameter WIDTH=16) (
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input logic [WIDTH-1:0] a, b,
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input logic [WIDTH-1:0] a, b,
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input logic sgnd,
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input logic sgnd,
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@ -45,6 +61,13 @@ module ppa_comparator #(parameter WIDTH=16) (
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assign flags = {eq, lt};
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assign flags = {eq, lt};
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endmodule
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endmodule
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module ppa_add_8 #(parameter WIDTH=8) (
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input logic [WIDTH-1:0] a, b,
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output logic [WIDTH-1:0] y);
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assign y = a + b;
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endmodule
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module ppa_add_16 #(parameter WIDTH=16) (
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module ppa_add_16 #(parameter WIDTH=16) (
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input logic [WIDTH-1:0] a, b,
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input logic [WIDTH-1:0] a, b,
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output logic [WIDTH-1:0] y);
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output logic [WIDTH-1:0] y);
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@ -66,6 +89,19 @@ module ppa_add_64 #(parameter WIDTH=64) (
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assign y = a + b;
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assign y = a + b;
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endmodule
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endmodule
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module ppa_add_128 #(parameter WIDTH=128) (
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input logic [WIDTH-1:0] a, b,
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output logic [WIDTH-1:0] y);
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assign y = a + b;
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endmodule
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module ppa_mult_8 #(parameter WIDTH=8) (
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input logic [WIDTH-1:0] a, b,
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output logic [WIDTH*2-1:0] y); //is this right width
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assign y = a * b;
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endmodule
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module ppa_mult_16 #(parameter WIDTH=16) (
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module ppa_mult_16 #(parameter WIDTH=16) (
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input logic [WIDTH-1:0] a, b,
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input logic [WIDTH-1:0] a, b,
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output logic [WIDTH*2-1:0] y); //is this right width
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output logic [WIDTH*2-1:0] y); //is this right width
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@ -84,6 +120,12 @@ module ppa_mult_64 #(parameter WIDTH=64) (
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assign y = a * b;
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assign y = a * b;
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endmodule
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endmodule
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module ppa_mult_128 #(parameter WIDTH=128) (
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input logic [WIDTH-1:0] a, b,
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output logic [WIDTH*2-1:0] y); //is this right width
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assign y = a * b;
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endmodule
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module ppa_alu_16 #(parameter WIDTH=16) (
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module ppa_alu_16 #(parameter WIDTH=16) (
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input logic [WIDTH-1:0] A, B,
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input logic [WIDTH-1:0] A, B,
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input logic [2:0] ALUControl,
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input logic [2:0] ALUControl,
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@ -180,6 +222,15 @@ module ppa_shiftleft #(parameter WIDTH=32) (
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assign y = a << amt;
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assign y = a << amt;
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endmodule
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endmodule
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module ppa_shifter_8 #(parameter WIDTH=8) (
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input logic [WIDTH-1:0] A,
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input logic [$clog2(WIDTH)-1:0] Amt,
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input logic Right, Arith, W64,
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output logic [WIDTH-1:0] Y);
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ppa_shifter #(WIDTH) sh (.*);
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endmodule
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module ppa_shifter_16 #(parameter WIDTH=16) (
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module ppa_shifter_16 #(parameter WIDTH=16) (
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input logic [WIDTH-1:0] A,
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input logic [WIDTH-1:0] A,
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input logic [$clog2(WIDTH)-1:0] Amt,
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input logic [$clog2(WIDTH)-1:0] Amt,
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@ -207,6 +258,15 @@ module ppa_shifter_64 #(parameter WIDTH=64) (
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ppa_shifter #(WIDTH) sh (.*);
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ppa_shifter #(WIDTH) sh (.*);
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endmodule
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endmodule
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module ppa_shifter_128 #(parameter WIDTH=128) (
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input logic [WIDTH-1:0] A,
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input logic [$clog2(WIDTH)-1:0] Amt,
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input logic Right, Arith, W64,
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output logic [WIDTH-1:0] Y);
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ppa_shifter #(WIDTH) sh (.*);
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endmodule
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module ppa_shifter #(parameter WIDTH=32) (
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module ppa_shifter #(parameter WIDTH=32) (
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input logic [WIDTH-1:0] A,
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input logic [WIDTH-1:0] A,
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input logic [$clog2(WIDTH)-1:0] Amt,
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input logic [$clog2(WIDTH)-1:0] Amt,
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@ -221,14 +281,7 @@ module ppa_shifter #(parameter WIDTH=32) (
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// For RV64, 32 and 64-bit shifts are needed, with sign extension.
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// For RV64, 32 and 64-bit shifts are needed, with sign extension.
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// funnel shifter input (see CMOS VLSI Design 4e Section 11.8.1, note Table 11.11 shift types wrong)
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// funnel shifter input (see CMOS VLSI Design 4e Section 11.8.1, note Table 11.11 shift types wrong)
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if (WIDTH==32) begin:shifter // RV32
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if (WIDTH == 64) begin:shifter // RV64 fix what about 128
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always_comb // funnel mux
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if (Right)
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if (Arith) z = {{31{A[31]}}, A};
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else z = {31'b0, A};
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else z = {A, 31'b0};
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assign amttrunc = Amt; // shift amount
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end else begin:shifter // RV64
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always_comb // funnel mux
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always_comb // funnel mux
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if (W64) begin // 32-bit shifts
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if (W64) begin // 32-bit shifts
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if (Right)
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if (Right)
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@ -241,8 +294,15 @@ module ppa_shifter #(parameter WIDTH=32) (
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else z = {63'b0, A};
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else z = {63'b0, A};
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else z = {A, 63'b0};
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else z = {A, 63'b0};
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end
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end
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assign amttrunc = W64 ? {1'b0, Amt[4:0]} : Amt; // 32 or 64-bit shift
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end else begin:shifter // RV32,
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always_comb // funnel mux
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if (Right)
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if (Arith) z = {{WIDTH-1{A[WIDTH-1]}}, A};
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else z = {{WIDTH-1{1'b0}}, A};
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else z = {A, {WIDTH-1{1'b0}}};
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assign amttrunc = Amt; // shift amount
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end
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end
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assign amttrunc = (W64 & WIDTH==64) ? {1'b0, Amt[4:0]} : Amt; // 32 or 64-bit shift fix
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// opposite offset for right shfits
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// opposite offset for right shfits
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assign offset = Right ? amttrunc : ~amttrunc;
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assign offset = Right ? amttrunc : ~amttrunc;
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