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Merge pull request #1012 from rosethompson/main
Update hptwAccessFault to generate additional hptw access faults during ifu fetches
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commit
d313aed04f
@ -48,7 +48,32 @@ main:
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lw t1, 0(t0) # this load is a valid virtual address, but the page table will access an invalid address so it should cause a load access fault
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li t1, 0x00008067 # this store is a valid virtual address, but the page table will access an invalid address so it should cause a store access fault
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add t0, t0, t2
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sw t1, 0(t0)
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sw t1, 0(t0)
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j jumppoint
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jumppoint:
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.align 6 # aligns to cache line size
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sw t1, 0(t0)
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sw t1, 4(t0)
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sw t1, 8(t0)
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sw t1, 12(t0)
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sw t1, 16(t0)
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sw t1, 20(t0)
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sw t1, 24(t0)
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sw t1, 28(t0)
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sw t1, 32(t0)
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sw t1, 36(t0)
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sw t1, 40(t0)
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sw t1, 44(t0)
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sw t1, 48(t0)
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sw t1, 52(t0) # this one causes a concurrent I$ miss with HPTW access exception (store access exception)
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sw t1, 56(t0)
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lw t3, 0(t0)
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lw t3, 4(t0)
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lw t3, 8(t0)
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lw t3, 12(t0)
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lw t3, 16(t0)
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fence.I
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