diff --git a/src/ieu/aes_instructions/rcon_lut_128.sv b/src/ieu/aes_instructions/rcon_lut_128.sv
index af71e2ef8..89368408d 100644
--- a/src/ieu/aes_instructions/rcon_lut_128.sv
+++ b/src/ieu/aes_instructions/rcon_lut_128.sv
@@ -44,6 +44,5 @@ module rcon_lut_128(input logic [3:0] RD,
 	  4'hA : rcon_out = 8'h00;
 	  default : rcon_out = 8'h00;
 	endcase	
-     end        
-
+     end
 endmodule
diff --git a/src/ieu/aes_instructions/rrot8.sv b/src/ieu/aes_instructions/rrot8.sv
index 64d451b10..8f36f4317 100644
--- a/src/ieu/aes_instructions/rrot8.sv
+++ b/src/ieu/aes_instructions/rrot8.sv
@@ -60,5 +60,4 @@ module rrot8(input logic[31:0] x,
    assign result[29] = x[5];
    assign result[30] = x[6];
    assign result[31] = x[7];
-
 endmodule