From 19495af18a0b9db9e24fb7bd98c57d1ced8624d4 Mon Sep 17 00:00:00 2001 From: David Harris Date: Mon, 23 Dec 2024 06:21:22 -0800 Subject: [PATCH 1/2] Added Zfhmin support for functional coverage --- config/rv32gc/coverage.svh | 2 ++ config/rv64gc/coverage.svh | 2 ++ 2 files changed, 4 insertions(+) diff --git a/config/rv32gc/coverage.svh b/config/rv32gc/coverage.svh index ccc194a27..789f6ae70 100644 --- a/config/rv32gc/coverage.svh +++ b/config/rv32gc/coverage.svh @@ -26,6 +26,8 @@ `include "ZfaZfh_coverage.svh" `include "Zfh_coverage.svh" `include "ZfhD_coverage.svh" +// Note: Zfhmin is a subset of Zfh, so usually only one or the other would be used. When Zfhmin and D are supported, ZfhD should also be enabled +`include "Zfhmin_coverage.svh" `include "Zicond_coverage.svh" `include "Zca_coverage.svh" `include "Zcb_coverage.svh" diff --git a/config/rv64gc/coverage.svh b/config/rv64gc/coverage.svh index d0ec96fb8..f86f0882f 100644 --- a/config/rv64gc/coverage.svh +++ b/config/rv64gc/coverage.svh @@ -26,6 +26,8 @@ `include "ZfaZfh_coverage.svh" `include "ZfhD_coverage.svh" `include "Zfh_coverage.svh" +// Note: Zfhmin is a subset of Zfh, so usually only one or the other would be used. When Zfhmin and D are supported, ZfhD should also be enabled +`include "Zfhmin_coverage.svh" `include "Zicond_coverage.svh" `include "Zca_coverage.svh" `include "Zcb_coverage.svh" From 45d4bf0f60c7a1046a9fea3cdad0a267ecd848aa Mon Sep 17 00:00:00 2001 From: David Harris Date: Mon, 23 Dec 2024 06:22:11 -0800 Subject: [PATCH 2/2] Typo fix --- src/mmu/tlb/tlbram.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mmu/tlb/tlbram.sv b/src/mmu/tlb/tlbram.sv index 3b329705d..a252bbd23 100644 --- a/src/mmu/tlb/tlbram.sv +++ b/src/mmu/tlb/tlbram.sv @@ -51,6 +51,6 @@ module tlbram import cvw::*; #(parameter cvw_t P, or_rows #(TLB_ENTRIES, P.XLEN) PTEOr(RamRead, PageTableEntry); // Rename the bits read from the TLB RAM - assign PTEAccessBits = {PageTableEntry[P.XLEN-1:P.XLEN-4] & {4{P.XLEN == 64}}, PageTableEntry[7:0]}; // for RV64 include N and PBMT bits and OR of reserved bitss + assign PTEAccessBits = {PageTableEntry[P.XLEN-1:P.XLEN-4] & {4{P.XLEN == 64}}, PageTableEntry[7:0]}; // for RV64 include N and PBMT bits and OR of reserved bits assign PPN = PageTableEntry[P.PPN_BITS+9:10]; endmodule