From cc3b2bf4351a62465f1ef9bd3dea8ead2cf8ca48 Mon Sep 17 00:00:00 2001 From: Alec Vercruysse Date: Wed, 12 Apr 2023 13:32:36 -0700 Subject: [PATCH] Cachefsm gate LRUWriteEn with ~FlushStage --- src/cache/cache.sv | 2 +- src/cache/cachefsm.sv | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/cache/cache.sv b/src/cache/cache.sv index 2d90e98e8..ea7504f23 100644 --- a/src/cache/cache.sv +++ b/src/cache/cache.sv @@ -129,7 +129,7 @@ module cache #(parameter LINELEN, NUMLINES, NUMWAYS, LOGBWPL, WORDLEN, MUXINTE // Select victim way for associative caches if(NUMWAYS > 1) begin:vict cacheLRU #(NUMWAYS, SETLEN, OFFSETLEN, NUMLINES) cacheLRU( - .clk, .reset, .CacheEn, .FlushStage, .HitWay, .ValidWay, .VictimWay, .CacheSet, .LRUWriteEn, + .clk, .reset, .CacheEn, .HitWay, .ValidWay, .VictimWay, .CacheSet, .LRUWriteEn, .SetValid, .PAdr(PAdr[SETTOP-1:OFFSETLEN]), .InvalidateCache, .FlushCache); end else assign VictimWay = 1'b1; // one hot. diff --git a/src/cache/cachefsm.sv b/src/cache/cachefsm.sv index a42176325..c5e261f27 100644 --- a/src/cache/cachefsm.sv +++ b/src/cache/cachefsm.sv @@ -224,8 +224,9 @@ module cachefsm #(parameter READ_ONLY_CACHE = 0) ( // write enables internal to cache assign SetValid = CurrState == STATE_WRITE_LINE; + // coverage off -item e 1 -fecexprrow 8 assign LRUWriteEn = (CurrState == STATE_READY & AnyHit) | - (CurrState == STATE_WRITE_LINE); + (CurrState == STATE_WRITE_LINE) & ~FlushStage; assign SelFetchBuffer = CurrState == STATE_WRITE_LINE | CurrState == STATE_READ_HOLD; endmodule // cachefsm