diff --git a/fpga/generator/wave_config.wcfg b/fpga/generator/wave_config.wcfg index 81fc67f05..f87f68696 100644 --- a/fpga/generator/wave_config.wcfg +++ b/fpga/generator/wave_config.wcfg @@ -3,30 +3,27 @@ - + - - - + + + - - + + - + - FullPathName wallypipelinedsocwrapper/wallypipelinedsoc/core/PCM[63:0] PCM[63:0] HEXRADIX - true - STYLE_DIGITAL FullPathName @@ -78,6 +75,7 @@ CPU to LSU label + FullPathName wallypipelinedsocwrapper/wallypipelinedsoc/core/IEUAdrM[63:0] @@ -152,8 +150,8 @@ label FullPathName - wallypipelinedsocwrapper/wallypipelinedsoc/core/priv.priv/csr/csrm/MEDELEG_REGW[63:0] - MEDELEG_REGW[63:0] + wallypipelinedsocwrapper/wallypipelinedsoc/core/priv.priv/csr/csrm/MEDELEG_REGW[11:0] + MEDELEG_REGW[11:0] HEXRADIX true STYLE_DIGITAL @@ -176,8 +174,8 @@ FullPathName - wallypipelinedsocwrapper/wallypipelinedsoc/core/priv.priv/csr/csrm/MEDELEG_REGW[63:0] - MEDELEG_REGW[63:0] + wallypipelinedsocwrapper/wallypipelinedsoc/core/priv.priv/csr/csrm/MEDELEG_REGW[11:0] + MEDELEG_REGW[11:0] HEXRADIX true STYLE_DIGITAL @@ -269,6 +267,15 @@ dcache fsm + + FullPathName + wallypipelinedsocwrapper/wallypipelinedsoc/core/lsu/bus.dcache.dcache/cachefsm/CurrState[3:0] + CurrState[3:0] + HEXRADIX + true + STYLE_DIGITAL + dcache fsm + EBU label @@ -320,14 +327,6 @@ true STYLE_DIGITAL - - FullPathName - wallypipelinedsocwrapper/wallypipelinedsoc/core/ebu.ebu/HWDATA[63:0] - HWDATA[63:0] - HEXRADIX - true - STYLE_DIGITAL - FullPathName wallypipelinedsocwrapper/wallypipelinedsoc/core/ebu.ebu/HREADY @@ -655,13 +654,6 @@ hazards label - - FullPathName - wallypipelinedsocwrapper/wallypipelinedsoc/core/hzu/BPPredWrongE - BPPredWrongE - true - STYLE_DIGITAL - FullPathName wallypipelinedsocwrapper/wallypipelinedsoc/core/hzu/BreakpointFaultM @@ -676,20 +668,6 @@ true STYLE_DIGITAL - - FullPathName - wallypipelinedsocwrapper/wallypipelinedsoc/core/hzu/CSRWriteFencePendingDEM - CSRWriteFencePendingDEM - true - STYLE_DIGITAL - - - FullPathName - wallypipelinedsocwrapper/wallypipelinedsoc/core/hzu/DivBusyE - DivBusyE - true - STYLE_DIGITAL - FullPathName wallypipelinedsocwrapper/wallypipelinedsoc/core/hzu/EcallFaultM @@ -743,7 +721,6 @@ flush/stall label - FullPathName wallypipelinedsocwrapper/wallypipelinedsoc/core/hzu/FlushD @@ -772,13 +749,6 @@ true STYLE_DIGITAL - - FullPathName - wallypipelinedsocwrapper/wallypipelinedsoc/core/hzu/StallD - StallD - true - STYLE_DIGITAL - FullPathName wallypipelinedsocwrapper/wallypipelinedsoc/core/hzu/StallE @@ -801,14 +771,6 @@ STYLE_DIGITAL - - FullPathName - wallypipelinedsocwrapper/wallypipelinedsoc/core/priv.priv/csr/csrs/csrs.SCAUSE_REGW[63:0] - csrs.SCAUSE_REGW[63:0] - HEXRADIX - true - STYLE_DIGITAL - FullPathName wallypipelinedsocwrapper/wallypipelinedsoc/core/priv.priv/csr/csrm/MCAUSE_REGW[63:0] @@ -822,7 +784,7 @@ label - label + FullPathName wallypipelinedsocwrapper/wallypipelinedsoc/core/ifu/bus.icache.icache/cachefsm/CurrState[3:0] CurrState[3:0] HEXRADIX @@ -831,7 +793,7 @@ STYLE_DIGITAL - label + FullPathName wallypipelinedsocwrapper/wallypipelinedsoc/core/ifu/bus.icache.ahbcacheinterface/AHBBuscachefsm/CurrState[2:0] CurrState[2:0] HEXRADIX @@ -856,10 +818,43 @@ STYLE_DIGITAL + + FullPathName + wallypipelinedsocwrapper/wallypipelinedsoc/core/ifu/bus.icache.icache/cachefsm/CurrState[3:0] + CurrState[3:0] + HEXRADIX + icache fsm + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsocwrapper/wallypipelinedsoc/core/ifu/bus.icache.ahbcacheinterface/AHBBuscachefsm/CurrState[2:0] + CurrState[2:0] + HEXRADIX + ifu bus fsm + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsocwrapper/wallypipelinedsoc/core/ifu/PCNextF[63:0] + PCNextF[63:0] + HEXRADIX + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsocwrapper/wallypipelinedsoc/core/ifu/PCPF[55:0] + PCPF[55:0] + HEXRADIX + true + STYLE_DIGITAL + TLB label - FullPathName wallypipelinedsocwrapper/wallypipelinedsoc/core/lsu/DTLBMissM @@ -889,6 +884,34 @@ STYLE_DIGITAL + + FullPathName + wallypipelinedsocwrapper/wallypipelinedsoc/core/lsu/DTLBMissM + DTLBMissM + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsocwrapper/wallypipelinedsoc/core/lsu/DTLBWriteM + DTLBWriteM + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsocwrapper/wallypipelinedsoc/core/lsu/ITLBMissF + ITLBMissF + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsocwrapper/wallypipelinedsoc/core/lsu/ITLBWriteF + ITLBWriteF + true + STYLE_DIGITAL + FullPathName wallypipelinedsocwrapper/wallypipelinedsoc/core/priv.priv/csr/csrm/MEPC_REGW[63:0] @@ -897,14 +920,6 @@ true STYLE_DIGITAL - - FullPathName - wallypipelinedsocwrapper/wallypipelinedsoc/core/priv.priv/csr/csrs/SEPC_REGW[63:0] - SEPC_REGW[63:0] - HEXRADIX - true - STYLE_DIGITAL - FullPathName wallypipelinedsocwrapper/wallypipelinedsoc/core/ieu/dp/regf/rf[2]__0[63:0] @@ -929,12 +944,19 @@ true STYLE_DIGITAL - - FullPathName - wallypipelinedsocwrapper/wallypipelinedsoc/core/lsu/VIRTMEM_SUPPORTED.hptw/WalkerState[3:0] + + wallypipelinedsocwrapper/wallypipelinedsoc/core/lsu/hptw.hptw/WalkerState[3:0] WalkerState[3:0] HEXRADIX - true - STYLE_DIGITAL + + + wallypipelinedsocwrapper/wallypipelinedsoc/core/lsu/LSUHADDR[31:0] + LSUHADDR[31:0] + HEXRADIX + + + wallypipelinedsocwrapper/wallypipelinedsoc/core/lsu/ReadDataM[63:0] + ReadDataM[63:0] + HEXRADIX diff --git a/linux/devicetree/wally-vcu118.dts b/linux/devicetree/wally-vcu118.dts index 224d4570f..a4794f0d0 100644 --- a/linux/devicetree/wally-vcu118.dts +++ b/linux/devicetree/wally-vcu118.dts @@ -21,8 +21,8 @@ cpus { #address-cells = <0x01>; #size-cells = <0x00>; - clock-frequency = <0x24AE230>; - timebase-frequency = <0x24AE230>; + clock-frequency = <0x2FAF080>; + timebase-frequency = <0x2FAF080>; cpu@0 { phandle = <0x01>; @@ -51,7 +51,7 @@ uart@10000000 { interrupts = <0x0a>; interrupt-parent = <0x03>; - clock-frequency = <0x24AE230>; + clock-frequency = <0x2FAF080>; reg = <0x00 0x10000000 0x00 0x100>; compatible = "ns16550a"; }; @@ -67,6 +67,20 @@ #address-cells = <0x00>; }; + mmc@13000 { + interrupts = <0x14>; + compatible = "riscv,axi-sd-card-1.0"; + reg = <0x00 0x13000 0x00 0x7F>; + fifo-depth = <256>; + bus-width = <4>; + interrupt-parent = <0x03>; + clock = <0x2FAF080>; + max-frequency = <0x989680>; + cap-sd-highspeed; + cap-mmc-highspeed; + no-sdio; + }; + clint@2000000 { interrupts-extended = <0x02 0x03 0x02 0x07>; reg = <0x00 0x2000000 0x00 0x10000>;