diff --git a/sim/regression-wally b/sim/regression-wally
index 4c5286886..f58c8bdfe 100755
--- a/sim/regression-wally
+++ b/sim/regression-wally
@@ -313,25 +313,27 @@ if (softfloat):
     "fdh_ieee_div_2_1_rv32gc", "fdh_ieee_div_2_1_rv64gc", "fdh_ieee_div_2_2_rv32gc",
     "fdh_ieee_div_2_2_rv64gc", "fdh_ieee_div_2_4_rv32gc", "fdh_ieee_div_2_4_rv64gc",
     "fdh_ieee_div_4_1_rv32gc", "fdh_ieee_div_4_1_rv64gc", "fdh_ieee_div_4_2_rv32gc",
-    "fdh_ieee_div_4_2_rv64gc", "fdh_ieee_div_4_4_rv64gc", "fd_ieee_div_2_1_rv32gc",
-    "fd_ieee_div_2_1_rv64gc", "fd_ieee_div_2_2_rv32gc", "fd_ieee_div_2_2_rv64gc",
-    "fd_ieee_div_2_4_rv32gc", "fd_ieee_div_2_4_rv64gc", "fd_ieee_div_4_1_rv32gc",
-    "fd_ieee_div_4_1_rv64gc", "fd_ieee_div_4_2_rv32gc", "fd_ieee_div_4_2_rv64gc",
-    "fd_ieee_div_4_4_rv64gc", "fdqh_ieee_div_2_1_rv32gc", "fdqh_ieee_div_2_1_rv64gc",
-    "fdqh_ieee_div_2_2_rv32gc", "fdqh_ieee_div_2_2_rv64gc", "fdqh_ieee_div_2_4_rv32gc",
-    "fdqh_ieee_div_2_4_rv64gc", "fdqh_ieee_div_4_1_rv32gc", "fdqh_ieee_div_4_1_rv64gc",
-    "fdqh_ieee_div_4_2_rv32gc", "fdqh_ieee_div_4_2_rv64gc", "fdqh_ieee_div_4_4_rv64gc",
+    "fdh_ieee_div_4_2_rv64gc", "fdh_ieee_div_4_4_rv32gc", "fdh_ieee_div_4_4_rv64gc",
+    "fd_ieee_div_2_1_rv32gc", "fd_ieee_div_2_1_rv64gc", "fd_ieee_div_2_2_rv32gc",
+    "fd_ieee_div_2_2_rv64gc", "fd_ieee_div_2_4_rv32gc", "fd_ieee_div_2_4_rv64gc",
+    "fd_ieee_div_4_1_rv32gc", "fd_ieee_div_4_1_rv64gc", "fd_ieee_div_4_2_rv32gc",
+    "fd_ieee_div_4_2_rv64gc", "fd_ieee_div_4_4_rv32gc", "fd_ieee_div_4_4_rv64gc",
+    "fdqh_ieee_div_2_1_rv32gc", "fdqh_ieee_div_2_1_rv64gc", "fdqh_ieee_div_2_2_rv32gc",
+    "fdqh_ieee_div_2_2_rv64gc", "fdqh_ieee_div_2_4_rv32gc", "fdqh_ieee_div_2_4_rv64gc",
+    "fdqh_ieee_div_4_1_rv32gc", "fdqh_ieee_div_4_1_rv64gc", "fdqh_ieee_div_4_2_rv32gc",
+    "fdqh_ieee_div_4_2_rv64gc", "fdqh_ieee_div_4_4_rv32gc", "fdqh_ieee_div_4_4_rv64gc",
     "fdq_ieee_div_2_1_rv32gc", "fdq_ieee_div_2_1_rv64gc", "fdq_ieee_div_2_2_rv32gc",
     "fdq_ieee_div_2_2_rv64gc", "fdq_ieee_div_2_4_rv32gc", "fdq_ieee_div_2_4_rv64gc",
     "fdq_ieee_div_4_1_rv32gc", "fdq_ieee_div_4_1_rv64gc", "fdq_ieee_div_4_2_rv32gc",
-    "fdq_ieee_div_4_2_rv64gc", "fdq_ieee_div_4_4_rv64gc", "fh_ieee_div_2_1_rv32gc",
-    "fh_ieee_div_2_1_rv64gc", "fh_ieee_div_2_2_rv32gc", "fh_ieee_div_2_2_rv64gc",
-    "fh_ieee_div_2_4_rv32gc", "fh_ieee_div_2_4_rv64gc", "fh_ieee_div_4_1_rv32gc",
-    "fh_ieee_div_4_1_rv64gc", "fh_ieee_div_4_2_rv32gc", "fh_ieee_div_4_2_rv64gc",
-    "fh_ieee_div_4_4_rv64gc", "f_ieee_div_2_1_rv32gc", "f_ieee_div_2_1_rv64gc",
-    "f_ieee_div_2_2_rv32gc", "f_ieee_div_2_2_rv64gc", "f_ieee_div_2_4_rv32gc",
-    "f_ieee_div_2_4_rv64gc", "f_ieee_div_4_1_rv32gc", "f_ieee_div_4_1_rv64gc",
-    "f_ieee_div_4_2_rv32gc", "f_ieee_div_4_2_rv64gc", "f_ieee_div_4_4_rv64gc"
+    "fdq_ieee_div_4_2_rv64gc", "fdq_ieee_div_4_4_rv32gc", "fdq_ieee_div_4_4_rv64gc",
+    "fh_ieee_div_2_1_rv32gc", "fh_ieee_div_2_1_rv64gc", "fh_ieee_div_2_2_rv32gc",
+    "fh_ieee_div_2_2_rv64gc", "fh_ieee_div_2_4_rv32gc", "fh_ieee_div_2_4_rv64gc",
+    "fh_ieee_div_4_1_rv32gc", "fh_ieee_div_4_1_rv64gc", "fh_ieee_div_4_2_rv32gc",
+    "fh_ieee_div_4_2_rv64gc", "fh_ieee_div_4_4_rv32gc", "fh_ieee_div_4_4_rv64gc",
+    "f_ieee_div_2_1_rv32gc", "f_ieee_div_2_1_rv64gc", "f_ieee_div_2_2_rv32gc",
+    "f_ieee_div_2_2_rv64gc", "f_ieee_div_2_4_rv32gc", "f_ieee_div_2_4_rv64gc",
+    "f_ieee_div_4_1_rv32gc", "f_ieee_div_4_1_rv64gc", "f_ieee_div_4_2_rv32gc",
+    "f_ieee_div_4_2_rv64gc", "f_ieee_div_4_4_rv32gc", "f_ieee_div_4_4_rv64gc"
     ]
     for config in softfloatconfigs:
         # div test case