From 83765ea3bc3226bf0cc46dfcd3561e11e7da0067 Mon Sep 17 00:00:00 2001 From: David Harris Date: Sat, 4 Dec 2021 20:25:33 -0800 Subject: [PATCH 1/5] Added files to repo --- .gitignore | 1 + Makefile | 35 ++++-------- wally-pipelined/README.txt | 50 ++++++++++++++++++ .../linux-testgen/linux-testvectors/all.txt | 1 + .../linux-testvectors/bootmem.txt | 1 + .../linux-testvectors/checkpoint8500000 | 1 + .../linux-testgen/linux-testvectors/ram.txt | 1 + .../linux-testvectors/vmlinux.objdump | 1 + .../linux-testvectors/vmlinux.objdump.addr | 1 + .../linux-testvectors/vmlinux.objdump.lab | 1 + wally-pipelined/srt/sqrttestgen | Bin 0 -> 13168 bytes wally-pipelined/srt/testgen | Bin 0 -> 13088 bytes wally-setup.sh | 26 +++++++++ 13 files changed, 95 insertions(+), 24 deletions(-) create mode 100644 wally-pipelined/README.txt create mode 120000 wally-pipelined/linux-testgen/linux-testvectors/all.txt create mode 120000 wally-pipelined/linux-testgen/linux-testvectors/bootmem.txt create mode 120000 wally-pipelined/linux-testgen/linux-testvectors/checkpoint8500000 create mode 120000 wally-pipelined/linux-testgen/linux-testvectors/ram.txt create mode 120000 wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump create mode 120000 wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.addr create mode 120000 wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.lab create mode 100755 wally-pipelined/srt/sqrttestgen create mode 100755 wally-pipelined/srt/testgen create mode 100644 wally-setup.sh diff --git a/.gitignore b/.gitignore index 2542dd881..1f1454f92 100644 --- a/.gitignore +++ b/.gitignore @@ -21,6 +21,7 @@ wlft* /imperas-riscv-tests/logs *.o *.d +*.vstf testsBP/*/*/*.elf* testsBP/*/OBJ/* testsBP/*/*.a diff --git a/Makefile b/Makefile index a8ca63fe6..d715d72d3 100644 --- a/Makefile +++ b/Makefile @@ -1,31 +1,18 @@ -#make all: submodules other -#make all: submodules other -#submodules: addins/riscv-isa-sim addins/riscv-arch-test -# git pull --recurse-submodules -# -#other: make all: # move these parts into compiling archtest separtately - cp -r addins/riscv-isa-sim/arch_test_target/spike/device/rv32i_m/I addins/riscv-isa-sim/arch_test_target/spike/device/rv32i_m/F - cp -r addins/riscv-isa-sim/arch_test_target/spike/device/rv64i_m/I addins/riscv-isa-sim/arch_test_target/spike/device/rv64i_m/D -<<<<<<< HEAD -#why cat - cat addins/riscv-isa-sim/arch_test_target/spike/device/rv32i_m/F/Makefile.include -======= ->>>>>>> 29f2a1c5479d7a80debdb1ac337fcda628cc57a3 - sed -i 's/--isa=rv32i /--isa=32if/' addins/riscv-isa-sim/arch_test_target/spike/device/rv32i_m/F/Makefile.include - sed -i 's/--isa=rv64i /--isa=64if/' addins/riscv-isa-sim/arch_test_target/spike/device/rv64i_m/D/Makefile.include - if [ -d "addins/riscv-isa-sim/build" ]; then echo "Build exists"; else mkdir addins/riscv-isa-sim/build; fi - cd addins/riscv-isa-sim/build; ../configure --prefix=/cad/riscv/gcc/bin - make -C addins/riscv-isa-sim/build -# does sudo work? - - sudo make install -C addins/riscv-isa-sim/build - - cp addins/riscv-isa-sim/arch_test_target/spike/Makefile.include addins/riscv-arch-test/ +# cp -r addins/riscv-isa-sim/arch_test_target/spike/device/rv32i_m/I addins/riscv-isa-sim/arch_test_target/spike/device/rv32i_m/F +# cp -r addins/riscv-isa-sim/arch_test_target/spike/device/rv64i_m/I addins/riscv-isa-sim/arch_test_target/spike/device/rv64i_m/D +# sed -i 's/--isa=rv32i /--isa=32if/' addins/riscv-isa-sim/arch_test_target/spike/device/rv32i_m/F/Makefile.include +# sed -i 's/--isa=rv64i /--isa=64id/' addins/riscv-isa-sim/arch_test_target/spike/device/rv64i_m/D/Makefile.include +# if [ -d "addins/riscv-isa-sim/build" ]; then echo "Build exists"; else mkdir addins/riscv-isa-sim/build; fi +# cd addins/riscv-isa-sim/build; ../configure --prefix=/cad/riscv/gcc/bin +# make -C addins/riscv-isa-sim/build +# sudo make install -C addins/riscv-isa-sim/build +# cp addins/riscv-isa-sim/arch_test_target/spike/Makefile.include addins/riscv-arch-test/ # update with path including $RISCV_TOOLS # separate into make tests and make regression - sed -i '/export TARGETDIR ?=/c\export TARGETDIR ?= /home/harris/riscv-wally/addins/riscv-isa-sim/arch_test_target' tests/wally-riscv-arch-test/Makefile.include + cp $RISCV/riscv-isa-sim/arch_test_target/spike/Makefile.include addins/riscv-arch-test/ + sed -i '/export TARGETDIR ?=/c\export TARGETDIR ?= $RISCV/riscv-isa-sim/arch_test_target' tests/wally-riscv-arch-test/Makefile.include echo export RISCV_PREFIX = riscv64-unknown-elf- >> tests/wally-riscv-arch-test/Makefile.include make -C addins/riscv-arch-test make -C addins/riscv-arch-test XLEN=32 diff --git a/wally-pipelined/README.txt b/wally-pipelined/README.txt new file mode 100644 index 000000000..250554603 --- /dev/null +++ b/wally-pipelined/README.txt @@ -0,0 +1,50 @@ +Code Improvements +David_Harris@hmc.edu 15 Nov 2021 + +Remove depricated N-Mode stuff, including sd in privileged.sv +Look at version 13? of privileged spec. What should we add? +Reduce size of repo + +Timing optimization (Kip, Shreya) + Use ForwardSrcA instead of SrcA for mdu / fpu + Look at TLB -> PMP -> Access Fault -> Trap + may be able to precompute + Try flattening, see speedup + Take out Mul synthesis modes + +RISCV-Arch-tests + Port MMU tests + +FPU + spec difference on signaling/quiet NAN propagation + SRT Div/Sqrt (Katherine, maybe Udeema) + Get riscv-arch-tests running (James, Katherine) + Get testfloat all passing + Katherine's FPU optimization + +Linux Boot + Ben, Skyler + +FPGA Boot Linux (Ross) + +IFU/LSU + Block diagrams, code cleanup + Burst mode transfers to speed up IPC + Implications of no byte enables on subword write - do stores take extra cycle, should this be avoided? + +28 nm Implementation + Install processor + Memory macros + Synthesis & PNR + Timing review + +Benchmarking + +Flow + Kevin Kim has a makefile to check out and build all the pieces. Make sure this is running; change Repo README to use his makefile + +Code cleanup + .* fixes by thanksgiving + Rename top-level modules to abbreviations + Rename muldiv to mdu + Get rid of DESIGN_COMPILER flag and redundant multiplier \ No newline at end of file diff --git a/wally-pipelined/linux-testgen/linux-testvectors/all.txt b/wally-pipelined/linux-testgen/linux-testvectors/all.txt new file mode 120000 index 000000000..4275ab31a --- /dev/null +++ b/wally-pipelined/linux-testgen/linux-testvectors/all.txt @@ -0,0 +1 @@ +/courses/e190ax/buildroot_boot/all.txt \ No newline at end of file diff --git a/wally-pipelined/linux-testgen/linux-testvectors/bootmem.txt b/wally-pipelined/linux-testgen/linux-testvectors/bootmem.txt new file mode 120000 index 000000000..33bff4ce4 --- /dev/null +++ b/wally-pipelined/linux-testgen/linux-testvectors/bootmem.txt @@ -0,0 +1 @@ +/courses/e190ax/buildroot_boot/bootmem.txt \ No newline at end of file diff --git a/wally-pipelined/linux-testgen/linux-testvectors/checkpoint8500000 b/wally-pipelined/linux-testgen/linux-testvectors/checkpoint8500000 new file mode 120000 index 000000000..e48344418 --- /dev/null +++ b/wally-pipelined/linux-testgen/linux-testvectors/checkpoint8500000 @@ -0,0 +1 @@ +/courses/e190ax/buildroot_boot/checkpoint8500000 \ No newline at end of file diff --git a/wally-pipelined/linux-testgen/linux-testvectors/ram.txt b/wally-pipelined/linux-testgen/linux-testvectors/ram.txt new file mode 120000 index 000000000..209d4eed6 --- /dev/null +++ b/wally-pipelined/linux-testgen/linux-testvectors/ram.txt @@ -0,0 +1 @@ +/courses/e190ax/buildroot_boot/ram.txt \ No newline at end of file diff --git a/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump b/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump new file mode 120000 index 000000000..8f52aac07 --- /dev/null +++ b/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump @@ -0,0 +1 @@ +/courses/e190ax/buildroot_boot/vmlinux.objdump \ No newline at end of file diff --git a/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.addr b/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.addr new file mode 120000 index 000000000..62079f3a2 --- /dev/null +++ b/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.addr @@ -0,0 +1 @@ +/courses/e190ax/buildroot_boot/vmlinux.objdump.addr \ No newline at end of file diff --git a/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.lab b/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.lab new file mode 120000 index 000000000..fe8ecc6e4 --- /dev/null +++ b/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.lab @@ -0,0 +1 @@ +/courses/e190ax/buildroot_boot/vmlinux.objdump.lab \ No newline at end of file diff --git a/wally-pipelined/srt/sqrttestgen b/wally-pipelined/srt/sqrttestgen new file mode 100755 index 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1 December 2021 +# Set up tools for riscv-wally + +echo "Executing wally-setup.sh" + +# Path to RISC-V Tools +export RISCV=/opt/riscv # change this if you installed the tools in a different location + +# Tools +export PATH=$RISCV/riscv-gnu-toolchain/bin:$RISCV/riscv-gnu-toolchain/riscv64-unknown-elf/bin:$PATH # GCC tools +export PATH=~/riscv-wally/bin:$PATH # exe2memfile; change this if riscv-wally isn't at your home directory +export PATH=/cad/mentor/questa_sim-2021.2_1/questasim/bin:$PATH # Change this for your path to Modelsim +export PATH=/usr/local/bin/verilator:$PATH # Change this for your path to Verilator +export LD_LIBRARY_PATH=$RISCV/riscv-gnu-toolchain/lib:$RISCV/riscv-gnu-toolchain/riscv64-unknown-elf/lib:$LD_LIBRARY_PATH + +export MGLS_LICENSE_FILE=1717@solidworks.eng.hmc.edu # *** is this the right license server now + +# Imperas; *** remove if not using +PATH=/cad/riscv/imperas-riscv-tests/riscv-ovpsim-plus/bin/Linux64:/cad/riscv/imperas-riscv-tests/riscv-ovpsim/bin/Liux64:$PATH # *** maybe take this out based on Imperas +export LD_LIBRARY_PATH=/cad/imperas/Imperas.20200630/bin/Linux64:$LD_LIBRARY_PATH # remove if no imperas +IMPERAS_HOME=/cad/imperas/Imperas.20200630 +source $IMPERAS_HOME/bin/setup.sh +setupImperas $IMPERAS_HOME From 6c9db52801c9f1c36ef42204f4f1c6970008bdd6 Mon Sep 17 00:00:00 2001 From: bbracker Date: Sun, 5 Dec 2021 22:03:51 -0800 Subject: [PATCH 2/5] linux-testvectors symlinks shouldn't be in repo, especially not in this location --- wally-pipelined/linux-testgen/linux-testvectors/all.txt | 1 - wally-pipelined/linux-testgen/linux-testvectors/bootmem.txt | 1 - .../linux-testgen/linux-testvectors/checkpoint8500000 | 1 - wally-pipelined/linux-testgen/linux-testvectors/ram.txt | 1 - wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump | 1 - .../linux-testgen/linux-testvectors/vmlinux.objdump.addr | 1 - .../linux-testgen/linux-testvectors/vmlinux.objdump.lab | 1 - 7 files changed, 7 deletions(-) delete mode 120000 wally-pipelined/linux-testgen/linux-testvectors/all.txt delete mode 120000 wally-pipelined/linux-testgen/linux-testvectors/bootmem.txt delete mode 120000 wally-pipelined/linux-testgen/linux-testvectors/checkpoint8500000 delete mode 120000 wally-pipelined/linux-testgen/linux-testvectors/ram.txt delete mode 120000 wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump delete mode 120000 wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.addr delete mode 120000 wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.lab diff --git a/wally-pipelined/linux-testgen/linux-testvectors/all.txt b/wally-pipelined/linux-testgen/linux-testvectors/all.txt deleted file mode 120000 index 4275ab31a..000000000 --- a/wally-pipelined/linux-testgen/linux-testvectors/all.txt +++ /dev/null @@ -1 +0,0 @@ -/courses/e190ax/buildroot_boot/all.txt \ No newline at end of file diff --git a/wally-pipelined/linux-testgen/linux-testvectors/bootmem.txt b/wally-pipelined/linux-testgen/linux-testvectors/bootmem.txt deleted file mode 120000 index 33bff4ce4..000000000 --- a/wally-pipelined/linux-testgen/linux-testvectors/bootmem.txt +++ /dev/null @@ -1 +0,0 @@ -/courses/e190ax/buildroot_boot/bootmem.txt \ No newline at end of file diff --git a/wally-pipelined/linux-testgen/linux-testvectors/checkpoint8500000 b/wally-pipelined/linux-testgen/linux-testvectors/checkpoint8500000 deleted file mode 120000 index e48344418..000000000 --- a/wally-pipelined/linux-testgen/linux-testvectors/checkpoint8500000 +++ /dev/null @@ -1 +0,0 @@ -/courses/e190ax/buildroot_boot/checkpoint8500000 \ No newline at end of file diff --git a/wally-pipelined/linux-testgen/linux-testvectors/ram.txt b/wally-pipelined/linux-testgen/linux-testvectors/ram.txt deleted file mode 120000 index 209d4eed6..000000000 --- a/wally-pipelined/linux-testgen/linux-testvectors/ram.txt +++ /dev/null @@ -1 +0,0 @@ -/courses/e190ax/buildroot_boot/ram.txt \ No newline at end of file diff --git a/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump b/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump deleted file mode 120000 index 8f52aac07..000000000 --- a/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump +++ /dev/null @@ -1 +0,0 @@ -/courses/e190ax/buildroot_boot/vmlinux.objdump \ No newline at end of file diff --git a/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.addr b/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.addr deleted file mode 120000 index 62079f3a2..000000000 --- a/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.addr +++ /dev/null @@ -1 +0,0 @@ -/courses/e190ax/buildroot_boot/vmlinux.objdump.addr \ No newline at end of file diff --git a/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.lab b/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.lab deleted file mode 120000 index fe8ecc6e4..000000000 --- a/wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.lab +++ /dev/null @@ -1 +0,0 @@ -/courses/e190ax/buildroot_boot/vmlinux.objdump.lab \ No newline at end of file From d702599d56286e655dc1aa627560e019a9172334 Mon Sep 17 00:00:00 2001 From: bbracker Date: Mon, 6 Dec 2021 14:13:58 -0800 Subject: [PATCH 3/5] add buildroot-only option to regression --- wally-pipelined/regression/regression-wally.py | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/wally-pipelined/regression/regression-wally.py b/wally-pipelined/regression/regression-wally.py index c55e8b617..bedbe5db5 100755 --- a/wally-pipelined/regression/regression-wally.py +++ b/wally-pipelined/regression/regression-wally.py @@ -93,10 +93,13 @@ def main(): # max out at a limited number of concurrent processes to not overwhelm the system if '-all' in sys.argv: - TIMEOUT_DUR = 20*3600 + TIMEOUT_DUR = 20*3600 # seconds configs.append(getBuildrootTC(short=False)) + elif '-buildroot' in sys.argv: + TIMEOUT_DUR = 20*3600 # seconds + configs=[getBuildrootTC(short=False)] else: - TIMEOUT_DUR = 300 + TIMEOUT_DUR = 5*60 # seconds configs.append(getBuildrootTC(short=True)) print(configs) From b714490f926422482ddae0560374935f59523b80 Mon Sep 17 00:00:00 2001 From: bbracker Date: Mon, 6 Dec 2021 15:37:33 -0800 Subject: [PATCH 4/5] add make-tests scripts --- wally-pipelined/regression/make-tests.sh | 12 ++++++++++++ wally-pipelined/regression/regression-wally.py | 16 +++++++++------- 2 files changed, 21 insertions(+), 7 deletions(-) create mode 100755 wally-pipelined/regression/make-tests.sh diff --git a/wally-pipelined/regression/make-tests.sh b/wally-pipelined/regression/make-tests.sh new file mode 100755 index 000000000..e64f94455 --- /dev/null +++ b/wally-pipelined/regression/make-tests.sh @@ -0,0 +1,12 @@ +#!/bin/bash + +rm -r work* +cd ../../tests/imperas-riscv-tests/ +make allclean +make +cd ../wally-riscv-arch-test +make allclean +make +make XLEN=32 +exe2memfile.pl work/*/*/*.elf +cd ../../wally-pipelined/regression diff --git a/wally-pipelined/regression/regression-wally.py b/wally-pipelined/regression/regression-wally.py index bedbe5db5..1494bc46e 100755 --- a/wally-pipelined/regression/regression-wally.py +++ b/wally-pipelined/regression/regression-wally.py @@ -89,8 +89,13 @@ def run_test_case(config): def main(): """Run the tests and count the failures""" - # Scale the number of concurrent processes to the number of test cases, but - # max out at a limited number of concurrent processes to not overwhelm the system + try: + os.mkdir("logs") + except: + pass + + if '-makeTests' in sys.argv: + os.system('./make-tests.sh | tee ./logs/make-tests.log') if '-all' in sys.argv: TIMEOUT_DUR = 20*3600 # seconds @@ -101,12 +106,9 @@ def main(): else: TIMEOUT_DUR = 5*60 # seconds configs.append(getBuildrootTC(short=True)) - print(configs) - try: - os.mkdir("logs") - except: - pass + # Scale the number of concurrent processes to the number of test cases, but + # max out at a limited number of concurrent processes to not overwhelm the system with Pool(processes=min(len(configs),25)) as pool: num_fail = 0 results = {} From ffe7cf83e5ae710c502647132ba272d20964dd52 Mon Sep 17 00:00:00 2001 From: bbracker Date: Mon, 6 Dec 2021 19:32:38 -0800 Subject: [PATCH 5/5] regression.py bugfix --- wally-pipelined/regression/regression-wally.py | 1 + 1 file changed, 1 insertion(+) diff --git a/wally-pipelined/regression/regression-wally.py b/wally-pipelined/regression/regression-wally.py index 1494bc46e..810e7ca9d 100755 --- a/wally-pipelined/regression/regression-wally.py +++ b/wally-pipelined/regression/regression-wally.py @@ -89,6 +89,7 @@ def run_test_case(config): def main(): """Run the tests and count the failures""" + global configs try: os.mkdir("logs") except: